參數(shù)資料
型號: MT90826AL
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Quad Digital Switch
中文描述: TELECOM, DIGITAL TIME SWITCH, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, 0.65 MM PITCH, MS-022DD-1, MQFP-160
文件頁數(shù): 35/46頁
文件大小: 571K
代理商: MT90826AL
MT90826
Data Sheet
35
Zarlink Semiconductor Inc.
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied
Note 1: Maximum leakage on pins (output or I/O pins in high impedance state) is over an applied voltage (V)
Absolute Maximum Ratings*
Parameter
Symbol
Min.
Max.
Units
1
2
Supply Voltage
Voltage on any 3.3 V tolerant pin I/O (other than
supply pins)
Voltage on any 5 V tolerant pin I/O (other than sup-
ply pins)
Continuous Current at digital outputs
Package power dissipation
Storage temperature
V
DD
V
I
-0.3
5.0
V
V
V
SS
- 0.3
V
DD
+ 0.3
3
V
I
V
SS
- 0.3
5.0
V
4
5
6
I
o
P
D
T
S
20
1
mA
W
°
C
- 65
+125
Recommended Operating Conditions -
Voltages are with respect to ground (V
ss
) unless otherwise stated.
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
2
3
4
5
Operating Temperature
Positive Supply
Input High Voltage
Input High Voltage on 5 V Tolerant Inputs
Input Low Voltage
T
OP
V
DD
V
IH
V
IH
V
IL
-40
3.0
+85
3.6
V
DD
5.5
0.3V
DD
°
C
V
V
V
V
0.7V
DD
V
SS
DC Electrical Characteristics -
Voltages are with respect to ground (V
ss
) unless otherwise stated.
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
2
3
4
I
N
P
U
T
S
Supply Current
Input High Voltage
Input Low Voltage
Input Leakage (input pins)
Input Leakage (with pull-up
or pull-down)
Input Pin Capacitance
Output High Voltage
Output Low Voltage
High Impedance Leakage
Output Pin Capacitance
I
DD
V
IH
V
IL
I
IL
I
BL
64
100
mA
V
V
μ
A
μ
A
Output unloaded
0.7V
DD
0.3V
DD
15
50
0
<V
V
DD
See Note 1
5
6
7
8
9
C
I
V
OH
V
OL
I
OZ
C
O
10
pF
V
V
μ
A
pF
O
U
T
P
U
T
S
0.8V
DD
I
OH
= 10mA
I
OL
= 10mA
0 < V < V
DD
See Note 1
0.4
5
10
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