參數(shù)資料
型號: MT88L85
廠商: Mitel Networks Corporation
英文描述: 3V Integrated DTMF Transceiver with Power-Down and Adaptive Micro Interface(3V 集成雙音多頻信號(DTMF)接收器(帶電源關(guān)閉和自適應(yīng)微接口))
中文描述: 3V的集成雙音多頻收發(fā)器關(guān)閉電源和自適應(yīng)微型接口(3V的集成雙音多頻信號(DTMF)的接收器(帶電源關(guān)閉和自適應(yīng)微接口))
文件頁數(shù): 3/25頁
文件大?。?/td> 197K
代理商: MT88L85
MT88L85
4-73
Functional Description
The MT88L85 Integrated DTMF Transceiver consists
of a high performance DTMF receiver with an internal
gain setting amplifier and a DTMF generator, which
employs a burst counter to synthesize precise tone
bursts and pauses. A call progress mode can be
selected so that frequencies within the specified
passband can be detected. The adaptive micro
interface allows various microcontrollers to access
the MT88L85 internal registers.
Power-Down
The MT88L85 provides enhanced power-down
functionality to facilitate minimization of supply
current consumption. DTMF transmitter and receiver
circuit blocks can be independently powered down
via register control. When asserted, the RxEN
control bit powers down all analog and digital circuitry
associated solely with the DTMF and Call Progress
receiver. The TOUT control bit is used to disable the
transmitter and put all circuitry associated only with
the DTMF transmitter in power-down mode. With the
TOUT control bit asserted, the TONE output pin is
held in a high impedance (floating) state. When both
power-down control bits are asserted, circuits utilized
by both the DTMF transmitter and receiver are also
powered down. This power-down control disables
the crystal oscillators, and the VRef generator. In
addition, the IRQ, TONE output and DATA pins are
held in a high impedance state. Finally, the whole
device is put in a power-down state when the PWDN
pin is asserted.
Input Configuration
The input arrangement of the MT88L85 provides a
differential-input operational amplifier as well as a
bias source (V
Ref
), which is used to bias the inputs at
V
DD
/2. Provision is made for connection of a feedback
resistor to the op-amp output (GS) for gain
adjustment.
For applications which are required to meet a
guaranteed RX input level of -29dBm over the full
temperature and supply voltage range, a unity gain
input configuration as shown in Figures 3 and 4 can be
used.
For applications which require signal detection lower
than -29dBm, the external resistors can be configured
to give adequate gain. For example, if the application
requires tone detection of -31dB, the input gain can
be set to +2dB with the external resistors (see Figures
13 and 14 for value of resistors). However, when +2dB
gain is used, the corresponding maximum input signal
level must not exceed -6dBm.
Receiver Section
Separation of the low and high group tones is achieved
by applying the DTMF signal to the inputs of two sixth-
order
switched
capacitor
bandwidths of which correspond to the low and high
group frequencies (see Table 1). The filters also
incorporate notches at 350 Hz and 440 Hz for
exceptional dial tone rejection. Each filter output is
followed by a single order switched capacitor filter
section, which smooths the signals prior to limiting.
Limiting is performed by high-gain comparators which
are provided with hysteresis to prevent detection of
unwanted low-level signals. The outputs of the
comparators provide full rail logic swings at the
frequencies of the incoming DTMF signals.
bandpass
filters,
the
Figure 3 - Single-Ended Input Configuration
C
R
IN
R
F
IN+
IN-
GS
V
Ref
VOLTAGE GAIN
(A
V
) = R
F
/ R
IN
MT88L85
23
27
St/GT
Steering Input/Guard Time
output (bidirectional). A voltage greater than V
TSt
detected at
St causes the device to register the detected tone pair and update the output latch. A
voltage less than V
TSt
frees the device to accept a new tone pair. The GT output acts to
reset the external steering time-constant; its state is a function of ESt and the voltage on St.
Positive power supply (3V typ.).
No Connection.
24
28
V
DD
NC
8,9
17
3,5,
10,11
16,
20,
25
Pin Description
Pin #
Name
Description
24
28
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參數(shù)描述
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