參數(shù)資料
型號: MT88L85
廠商: Mitel Networks Corporation
英文描述: 3V Integrated DTMF Transceiver with Power-Down and Adaptive Micro Interface(3V 集成雙音多頻信號(DTMF)接收器(帶電源關閉和自適應微接口))
中文描述: 3V的集成雙音多頻收發(fā)器關閉電源和自適應微型接口(3V的集成雙音多頻信號(DTMF)的接收器(帶電源關閉和自適應微接口))
文件頁數(shù): 14/25頁
文件大小: 197K
代理商: MT88L85
MT88L85
4-84
Figure 15 - Application Notes
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Typical figures are at 25
°
C and for design aid only: not guaranteed and not subject to production testing.
Absolute Maximum Ratings
*
Parameter
Symbol
Min
Max
Units
1
2
3
4
5
Power supply voltage V
DD
-V
SS
Voltage on any pin
Current at any pin (Except V
DD
and
V
SS
)
Storage temperature
Package power dissipation
V
DD
-V
SS
V
I
5.5
V
V
V
SS
-0.3
V
DD
+0.3
10
+150
1000
mA
°
C
mW
T
ST
P
D
-65
Recommended Operating Conditions -
Voltages are with respect to ground (VSS) unless otherwise stated.
Parameter
Sym
Min
Typ
Max
Units
Test Conditions
1
2
3
Positive power supply
Operating temperature
Crystal clock frequency
V
DD
T
O
f
CLK
2.7
-40
3
3.6
+85
V
°
C
MHz
3.575965
3.579545
3.583124
INITIALIZATION PROCEDURE
A software reset must be included at the beginning of all programs to initialize the control registers after power up.
Description:
RS0
1)
Read Status Register
1
2)
Write to Control Register
1
3)
Write to Control Register
1
4)
Write to Control Register
1
5)
Write to Control Register
1
6)
Read Status Register
1
Motorola
R/W
Intel
WR
1
0
0
0
0
1
Data
b2
X
0
0
0
0
X
RD
0
1
1
1
1
0
b3
X
0
0
1
0
X
b1
X
0
0
0
0
X
b0
X
0
0
0
0
X
1
0
0
0
0
1
TYPICAL CONTROL SEQUENCE FOR BURST MODE APPLICATIONS
Transmit DTMF tones of 50 ms burst/50 ms pause and Receive DTMF Tones.
Sequence:
RS0
1
R/W
0
WR
0
RD
1
b3
1
b2
1
b1
0
b0
1
1)
Write to Control Register A
(tone out, DTMF, IRQ, Select Control Register B)
Write to Control Register B
(burst mode)
Write to Transmit Data Register
(send a digit 7)
Wait for an Interrupt or Poll Status Register
Read the Status Register
2)
1
0
0
1
0
0
0
0
3)
0
0
0
1
0
1
1
1
4)
5)
1
1
1
0
X
X
X
X
-if bit 1 is set, the Tx is ready for the next tone, in which case...
Write to Transmit Register
(send a digit 5)
0
0
0
1
0
1
0
1
-if bit 2 is set, a DTMF tone has been received, in which case....
Read the Receive Data Register
0
1
1
0
X
X
X
X
-if both bits are set...
Read the Receive Data Register
Write to Transmit Data Register
0
0
1
0
1
0
0
1
X
0
X
1
X
0
X
1
NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms (
2 ms) AFTER THE DATA IS WRITTEN TO THE TX
DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms (
4 ms)
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