參數(shù)資料
型號(hào)： MSP430P315S
廠商： Texas Instruments, Inc.
英文描述： MIXED SIGNAL MICROCONTROLLERS
中文描述： 混合信號(hào)微處理器
文件頁(yè)數(shù)： 48/70頁(yè)
文件大?。?/td> 1176K
代理商： MSP430P315S
SLAS368D
OCTOBER 2002
REVISED MARCH 2005
48
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
Flash Memory
PARAMETER
TEST
CONDITIONS
V
CC
MIN
NOM
MAX
UNIT
V
CC(PGM/
ERASE)
Program and Erase supply voltage
2.7
3.6
V
f
FTG
I
PGM
I
ERASE
t
CPT
t
CMErase
Flash Timing Generator frequency
257
476
kHz
Supply current from DV
CC
during program
Supply current from DV
CC
during erase
Cumulative program time
2.7 V/ 3.6 V
3
5
mA
2.7 V/ 3.6 V
3
7
mA
see Note 1
2.7 V/ 3.6 V
4
ms
Cumulative mass erase time
see Note 2
2.7 V/ 3.6 V
200
10
4
ms
Program/Erase endurance
10
5
cycles
t
Retention
t
Word
t
Block, 0
t
Block, 1-63
t
Block, End
t
Mass Erase
t
Seg Erase
NOTES:
Data retention duration
T
J
= 25
°
C
100
years
Word or byte program time
Block program time for 1
st
byte or word
35
30
Block program time for each additional byte or word
21
Block program end-sequence wait time
see Note 3
6
t
FTG
Mass erase time
Segment erase time
1. The cumulative program time must not be exceeded when writing to a 64-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. The mass erase duration generated by the flash timing generator is at least 11.1ms ( = 5297x1/f
FTG
,max = 5297x1/476kHz). To
achieve the required cumulative mass erase time the Flash Controller
’
s mass erase operation can be repeated until this time is met.
(A worst case minimum of 19 cycles are required).
3. These values are hardwired into the Flash Controller
’
s state machine (t
FTG
= 1/f
FTG
).
5297
4819
JTAG Interface
PARAMETER
TEST
CONDITIONS
V
CC
MIN
NOM
MAX
UNIT
2.2 V
0
5
MHz
f
TCK
TCK input frequency
see Note 1
3 V
0
10
MHz
k
R
Internal
NOTES:
Internal pull-up resistance on TMS, TCK, TDI/TCLK
1. f
TCK
may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pull-up resistors are implemented in all versions.
see Note 2
2.2 V/ 3 V
25
60
90
JTAG Fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
V
CC
MIN
NOM
MAX
UNIT
V
CC(FB)
V
FB
I
FB
t
FB
NOTES:
Supply voltage during fuse-blow condition
T
A
= 25
°
C
2.5
V
Voltage level on TDI/TCLK for fuse-blow: F versions
6
7
V
Supply current into TDI/TCLK during fuse blow
100
mA
Time to blow fuse
1. Once the fuse is blown, no further access to the MSP430 JTAG/Test and emulation features is possible. The JTAG block is switched
to bypass mode.
1
ms
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MSP430P325AIPG 功能描述:16位微控制器 - MCU 16kB OTP 512B RAM 14b ADC/84 seg LCD RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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