參數(shù)資料
型號: MSM7730
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 PITCH, PLASTIC, LQFP-144
文件頁數(shù): 9/20頁
文件大?。?/td> 179K
代理商: MSM7730
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s MSM7730 s
15
Oki Semiconductor
0x1E
Modem
16
RSSIAB
Contains two 6-bit fields: RSSIA and RSSIB. RSSIA is set to correspond to -
65 dB T the radio input. RSSIB is set to correspond to -85 dB T the radio input.
0x20
16
PHY Control (PHY_CTL)
Contains PHY transmit, receive, and Clear Channel Assessment (CCA) status.
0x22
16
User I/O port (internal)
The internal port is selected when the MSEL field in the PHY Configuration
registers equals a value between 0 and 3. The bit descriptions are different
depending on whether this registers is configured for internal or external use
(see next register entry). In the internal mode, the two 6-bit fields configure
each bit of the user I/O port as input or output, and whether values can be read
from or written to this register.
16
User I/O Port (external)
The external port is selected when the MSEL field in the PHY Configuration
registers equals a value between 4 and 7. The bit descriptions are different
depending on whether this registers is configured for internal or external use
(see above register entry). One 6-bit field contains the number of clock
periods from TXDRDY or RXDRDY assertion. The other 6-bit field contains
the number of RXCLK periods from the length field to the start of the PDU
packet.
0x26
16
RSSICD
Contains two 6-bit fields: RSSIC and RSSID. RSSIC corresponds to -80 dBm
at the radio input. RSSID corresponds to -75 dBm at the radio input.
0x28
16
Modem Control 0
Contains two 6-bit fields that set the 1- and 2-Mbps inner symbol modulation
index.
0x2A
16
Modem Control 1
Contains settings for parameters such as integration time for slow carrier
tracking group, antenna scan delay, ramp-up, and ramp-down sequences.
0x2C
16
Demodulator Control 0
Contains demodulator control word settings.
0x2E
16
Demodulator Control 1
Contains noise threshold and jamming counter information.
0x30
MAC Controll
16
Version Number
Contains the MSM7730 MAC version number (0x83).
0x32
16
Buffer Control
Contains the size and address of the receive circular buffer in shared memory.
0x34
16
Rx In Pointer
Contains a word offset from the start of the receive circular buffer in shared
memory. The offset indicates the location of the address where the next word
to be received will be stored.
0x36
16
Rx Out Pointer
Contains a word offset from the start of the receive circular buffer in shared
memory. The offset indicates the first word in the buffer that is available for
use by MAC hardware.
0x40
16
Power Down Control
Contains Hibernate mode request and wakeup information.
0x44
16
MAC Control
Contains filtering mode parameters as well as transmit, receive, PHY, and
modem enable information.
0x46
16
Tx Pointer
Contains the word offset from the start of the transmit pointer table.
0x48
16
Interrupt Enable
Enables interrupts based on the event type.
0x4A
16
Interrupt Acknowledge
This register has the exact same format as the Interrupt Enable register.
Setting a bit in this registers clears the corresponding bit in the Interrupt
Enable register.
0x4C
16
Interrupt Status
This register has the exact same format as the Interrupt Enable register but is
read-only. This register is written by hardware.
0x4E
16
Sequencer Status
Indicates current sequencer activity. Most bits are written by hardware and
are read-only. However, a global clear bit allows for all of the read-only bits to
be cleared at the same time.
MSM7730 Register Map (Continued)
Byte
Offset
Register
Group
Width
(bits)
Register Name
Description
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