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參數資料
| 型號： | MSM548332 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 278,400-Word×12-Bit Field Memory(278,400字×12位場存儲器) |
| 中文描述： | 27.84萬詞× 12位場存儲器（278400字× 12位場存儲器） |
| 文件頁數： | 6/23頁 |
| 文件大?。?/td> | 245K |
| 代理商： | MSM548332 |
Semiconductor
MSM548332
6/23
WRITE RELATED
WCLK : Write Clock
WCLK is a write control clock input. Synchronized with WCLK's rising edge, serial write access into
write ports is executed when WE is high and IE is high.
According to WCLK clocks, the internal counter for the serial address is incremented automatically.
In a write address set cycle, all the write addresses which were input from WXAD are stored into
internal address registers synchronously with WCLK. In this address set cycle, WADE/RX must be
held high and WR/TR must be held low.
In the write address reset cycle, various write address reset modes can be set synchronously with
WCLK. These reset cycles replace complicated serial address control with simple reset cycle control
which requires only one WCLK cycle. It greatly facilitates memory access.
WE : Write Enable
WE is a write enable clock input. WE enables or disables both internal write address pointers and
data-in buffers. When WE is high, the internal write address pointer is incremented synchronously
with WCLK. When WE is low, even if WCLK is input, the internal write address pointer is not
incremented.
DIN0-11 : Data-Ins
DIN0-11 are serial data-ins. Corresponding data-in-buffers are masked by IE.
WR/TR : Write Reset/Write Transfer
WR/TR is a write reset control input. Write address reset modes are defined when WR/TR level is
high according to the "FUNCTION TABLE for write".
When the write operation on a line is terminated, be sure to perform a write transfer operation by
WR/TR in order to store the written data in the write register to corresponding memory cells.
WXINC : Write X Address Increment
WXINC is a write X address (or line address) increment control input. In the write address reset cycle,
defined by WR/TR high, the write X address (or line address) is incremented when WXINC and
WADE/RX are high.
WADE/RX : Write Address Enable/Write X Address Reset Logic Function
WADE/RX is a dual functional control input. WADE, one of the two functions of WADE/RX, is a
write address enable input. In the write address reset cycle, defined by WR/TR high, X address (or
line address) input from WXAD is latched into internal write X address register synchronously with
WCLK.
WXAD : Write X Address
WXAD is a write X address (or line address) input. WXAD specifies line address. 9 bits of write X
address data are input serially from WXAD.
IE : Input Enable
IE is an input enable which controls the write operation. When IE is high, the input operation is
enabled. When IE is low, the write operation is masked. When WE signal is high, and IE low, the
internal serial write address pointer is incremented on the rising edge of WCLK without actual write
operations. This function facilitates picture in picture function in a TV system.
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