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參數(shù)資料
| 型號： | MSM548263 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 262,144-Word ×8-Bit Multiport DRAM(256k字×8位多端口動態(tài)RAM) |
| 中文描述： | 262,144字× 8位多端口內(nèi)存（256k字× 8位多端口動態(tài)RAM）的 |
| 文件頁數(shù)： | 37/40頁 |
| 文件大小： | 390K |
| 代理商： | MSM548263 |
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Semiconductor
MSM548263
37/40
Masked Split Write Transfer:
RAS
falling edge ---
CAS
= DSF = "H",
TRG
=
WE
= "L"
Split write transfer consists of loading 256 words by 8 bits of data from the non-active split SAM
register into a selected row of the corresponding split RAM. Serial data can be shifted into the
other half of the split SAM register simultaneously. During split write transfer operation, the
RAM port input clocks do not have to be synchronized with the serial clock SC, thus allowing
for real time transfer. This operation is the same as a mask write operation in RAM, so new and
persistent mode can be supported.
A split write transfer can be performed after a delay of t
STS
from the change of state of the QSF
output is satisfied.
A masked write transfer operation must precede split write transfer. The purpose is to switch the
SAM port from output mode to input mode, and to set the initial TAP location prior to split write
transfer operations.
Programmable SAM Stops in Split Transfer Cycle
The MSM548263 has a boundary split register operation using programmable stops. If a CBRS
cycle has been performed, the split transfer cycle performs the boundary operation.
Figure 2 shows an example of a boundary split register (4 stop points). The stop points define a
SAM location at which the access will change from one half of the SAM to the other half (at the
TAP address).
0
TAP1
255
TAP3
Lower SAM
256
511
Upper SAM
TAP2
S.T. (TAP2)
S.T. (TAP3)
Figure 2. Example of Boundary Split Register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM548512L-XXGS-K | 524,288-Word X 8-Bit High-Speed PSRAM |
| MSM548512L | 524,288-Word X 8-Bit High-Speed PSRAM |
| MSM548512L-10GS-K | 524,288-Word X 8-Bit High-Speed PSRAM |
| MSM548512L-10RS | 524,288-Word X 8-Bit High-Speed PSRAM |
| MSM548512L-12GS-K | 524,288-Word X 8-Bit High-Speed PSRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM548263-60JS | 制造商:ROHM Semiconductor 功能描述: |
| MSM548263-60TS-K | 制造商:OK International 功能描述: |
| MSM54V12222A-30TS-K | 制造商:OKI Semiconductor 功能描述:FIELD/FRAME/LINE MEMORY, 44 Pin, Plastic, TSOP |
| MSM54V12222B-25JDR17 | 制造商:ROHM Semiconductor 功能描述: |
| MSM54V12222B-25JSDR1 | 制造商:ROHM Semiconductor 功能描述: |
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