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參數(shù)資料
| 型號(hào)： | MR80C32-20/883:D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁(yè)數(shù)： | 70/103頁(yè) |
| 文件大?。?/td> | 25028K |
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161
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table
17.11.3
TCNT2 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers.
17.11.4
OCR2A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
17.11.5
OCR2B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2B pin.
Table 17-9.
Clock Select bit description.
CS22
CS21
CS20
Description
0
No clock source (Timer/Counter stopped).
001
clkT2S/(No prescaling)
010
clkT2S/8 (From prescaler)
011
clkT2S/32 (From prescaler)
100
clkT2S/64 (From prescaler)
101
clkT2S/128 (From prescaler)
110
clkT2S/256 (From prescaler)
111
clkT2S/1024 (From prescaler)
Bit
76543210
TCNT2[7:0]
TCNT2
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR2A[7:0]
OCR2A
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR2B[7:0]
OCR2B
Read/Write
R/W
Initial Value
00000000
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