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參數(shù)資料
| 型號： | MPC92433AER2 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 9/21頁 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER LVPECL 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 時鐘/頻率合成器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，晶體 |
| 輸出： | LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 1.428GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
MPC92433 Data Sheet
1428MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER
MPC92433 REVISION 3 FEBRUARY 6, 2013
17
2013 Integrated Device Technology, Inc.
Jitter Performance of the MPC92433
the MPC92433 across its specified VCO frequency range. For
some output dividers N, the cycle-to-cycle and period jitter is a
function of the VCO frequency and the output divider N. The
general trend is that as the output frequency increases (higher
VCO frequency and lower N-divider) the MPC92433 output jitter
decreases. Optimum jitter performance can be achieved at higher
VCO and output frequencies.
For the output dividers of N=2, 4 and 6 the cycle-to-cycle jitter
does not depend on the VCO frequency. For the output dividers of
2, 4 and 8 the period jitter does not depend on the VCO frequency.
The maximum cycle-to-cycle and period jitter published in Table 6
(AC characteristics) correspond to the jitter performance at the
lowest VCO frequency limit. The VCO frequency can be
calculated using formula (2).
AC Test Reference and Output Termination
The MPC92433 LVPECL outputs are designed to drive
50 transmission lines and require a DC termination to
the MPC92433 as used in characterization and test of this circuit.
If a separate termination voltage (VTT) is not available,
applications may use alternative output termination methods such
as shown in Figure 11 and Figure 12.
The high-speed differential output signals of the MPC92433
are incompatible to single-ended LVCMOS signals. In order to use
the synthesizer in LVCMOS clock signal environments, the dual-
channel translator device MC100ES60T23 provides the
necessary level conversion. The MC100ES60T23 has been
specifically designed to interface with the MPC92433 and
supports clock frequencies up to 300 MHz.
Figure 8. MPC92433 Cycle-to-Cycle Jitter
Figure 9. MPC92433 Period Jitter
.
Figure 10. MPC92433 AC Test Reference
Z = 50
RT = 50
Z = 50
RT = 50
VTT
Z = 50
QA
QB
Pulse
Generator
Z = 50
fREF = 16 MHz
Synthesizer
DUT MPC92433
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC92439 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:900MHz, Low Voltage, LVPECL Clock Syntheesizer |
| MPC92439AC | 功能描述:IC SYNTHESIZER LVPECL 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| MPC92439ACR2 | 功能描述:IC SYNTHESIZER LVPECL 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| MPC92439EI | 功能描述:時鐘合成器/抖動清除器 FSL 900MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC92439EIR2 | 功能描述:時鐘合成器/抖動清除器 FSL 900MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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