- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69037 > MPC92432AE (INTEGRATED DEVICE TECHNOLOGY INC) 1360 MHz, OTHER CLOCK GENERATOR, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | MPC92432AE |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 1360 MHz, OTHER CLOCK GENERATOR, PQFP48 |
| 封裝： | ROHS COMPLIANT, LQFP-48 |
| 文件頁數(shù)： | 17/19頁 |
| 文件大?。?/td> | 611K |
| 代理商： | MPC92432AE |
Advanced Clock Drivers Devices
Freescale Semiconductor
7
MPC92432
Table 6. AC Characteristics (VCC = 3.3 V ± 5%, TJ = –40°C to +85°C)(1)
1. AC characteristics apply for parallel output termination of 50
to VTT.
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fXTAL
Crystal Interface Frequency Range
15
16
20
MHz
fREF
FREF_EXT Reference Frequency Range
15
20
MHz
fVCO
VCO Frequency Range(2)
2. The input frequency fXTAL, the PLL divider M and P must match the VCO frequency range: fVCO = fXTAL M ÷ P. The feedback divider M is
limited to 170 <= M <= 340 (for P = 2) and 340 <= M <= 680 (for P = 4) for stable PLL operation.
1360
2720
MHz
fMAX
Output Frequency(3)
N = ÷2
N = ÷4
N = ÷8
N = ÷16
N = ÷32
N = ÷64
3. Output frequency for QA, QB if NB = 0. With NB = 1 the QB output frequency is half of the QA output frequency.
680
340
170
85
42.5
21.25
1360
680
340
170
85
42.5
MHz
fSCL
Serial Interface (I2C) Clock Frequency
0
0.4
MHz
tP,MIN
Minimum Pulse Width (P_LOAD)50
ns
DC
Output Duty Cycle
45
50
55
%
tSK(O)
Output-to-Output Skew
NB = 0 (fQA = fQB)
NB = 1 (fQA = 2 fQB)
38
96
ps
tr, tf
Output Rise/Fall Time (QA, QB)
0.05
0.3
ns
20% to 80%
tr, tf
Output Rise/Fall Time (SDA)
250
ns
CL = 400 pF
tP_EN
Output Enable Time (CLKSTOPx to QA, QB)
0
2 TQx
TQx = Output period
tP_DIS
Output Disable Time (CLKSTOPx to QA, QB)
0
1.5 TQx
TQx = Output period
tJIT(CC) Cycle-to-Cycle Jitter (RMS 1σ)
(4)
N = ÷2, ÷4, ÷8
N = ÷16
N = ÷32
N = ÷64
N = ÷128
4. Maximum cycle jitter measured at the lowest VCO frequency. Figure 8 shows the cycle jitter vs. frequency characteristics.
15
37
32
50
85
ps
tJIT(PER) Period Jitter (RMS 1σ)(5)
N = ÷2, ÷4
N = ÷8
N = ÷16
N = ÷32
N = ÷64
N = ÷128
5. Maximum cycle period measured at the lowest VCO frequency. Figure 9 shows the period jitter vs. frequency characteristics.
10
13
24
34
60
85
ps
BW
PLL Closed Loop Bandwidth(6)
P = 2
P = 4
6. –3 dB point of PLL transfer characteristics.
250 – 700
125 – 400
kHz
tLOCK
Maximum PLL Lock Time
10
ms
MPC92432
1360 MHz Dual Output LVPECL Clock Synthesizer
NETCOM
IDT 1360 MHz Dual Output LVPECL Clock Synthesizer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC92432
7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC9299FA | 400 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| MPC930FA | 140 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP32 |
| MPC930FA | 140 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP32 |
| MPC972FA | 125 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP52 |
| MPC9850VF | 500 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC92432AER2 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 FSL 1360MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC92432FA | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1360 MHz Dual Output LVPECL Clock Synthesizer |
| MPC92433 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:1428 MHz Dual Output LVPECL Clock Synthesizer |
| MPC92433AE | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 FSL 1428MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC92433AER2 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 FSL 1428MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。