參數(shù)資料
型號: MPC8548ECPXATGB
廠商: Freescale Semiconductor
文件頁數(shù): 71/151頁
文件大小: 0K
描述: MPU POWERQUICC III 783-PBGA
產(chǎn)品培訓模塊: MPC8548 PowerQUICC III Processors
標準包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.2GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
26
Freescale Semiconductor
DUART
7
DUART
This section describes the DC and AC electrical specifications for the DUART interface of the device.
7.1
DUART DC Electrical Characteristics
This table provides the DC electrical characteristics for the DUART interface.
7.2
DUART AC Electrical Specifications
This table provides the AC timing parameters for the DUART interface.
Table 20. DUART DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current (VIN
1 = 0 V or V
IN = VDD)
IIN
—±5
A
High-level output voltage (OVDD = min, IOH = –2 mA)
VOH
2.4
V
Low-level output voltage (OVDD = min, IOL = 2 mA)
VOL
—0.4
V
Note:
1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 21. DUART AC Timing Specifications
Parameter
Value
Unit
Notes
Minimum baud rate
fCCB/1,048,576
baud
1, 2
Maximum baud rate
fCCB/16
baud
1, 2, 3
Oversample rate
16
1, 4
Notes:
1. Guaranteed by design.
2. fCCB refers to the internal platform clock.
3. Actual attainable baud rate is limited by the latency of interrupt processing.
4. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are
sampled each 16th sample.
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