參數(shù)資料
型號(hào): MPC8347ECVRAJD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 533 MHz, RISC PROCESSOR, PBGA620
封裝: 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-620
文件頁數(shù): 76/102頁
文件大小: 1094K
代理商: MPC8347ECVRAJD
MPC8347E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Freescale Semiconductor
75
MVREF1
AF19
I
DDR
reference
voltage
MVREF2
AE10
I
DDR
reference
voltage
No Connection
NC
V1, V2, V5
Notes:
1. This pin is an open-drain signal. A weak pull-up resistor (1 k
Ω) should be placed on this pin to OVDD.
2. This pin is an open-drain signal. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to OVDD.
3. During reset, this output is actively driven rather than three-stated.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull-up if the chip is in PCI host mode. Follow the PCI specifications.
6. This pin must always be tied to GND.
7. This pin must always be left not connected.
8. Thermal sensitive resistor.
9. It is recommended that MDIC0 be tied to GRD using an 18
Ω resistor and MDIC1 be tied to DDR power using an 18 Ω resistor.
10.TSEC1_TXD[3] is required an external pull-up resistor. For proper functionality of the device, this pin must be pulled up or
actively driven high during a hard reset. No external pull-down resistors are allowed to be attached to this net.
Table 52. MPC8347E (PBGA) Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
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