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MPC8347E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
28
Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
Figure 13 shows the TBI transmit AC timing diagram.
Figure 13. TBI Transmit AC Timing Diagram
8.2.3.2
TBI Receive AC Timing Specifications
Table 26 provides the TBI receive AC timing specifications.
Table 26. TBI Receive AC Timing Specifications
At recommended operating conditions with LVDD/OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
PMA_RX_CLK clock period
tTRX
16.0
ns
PMA_RX_CLK skew
tSKTRX
7.5
—
8.5
ns
RX_CLK duty cycle
tTRXH/tTRX
40
—
60
%
RXD[7:0], RX_DV, RX_ER (RCG[9:0]) setup time to rising
PMA_RX_CLK
tTRDVKH
2
2.5
—
ns
RXD[7:0], RX_DV, RX_ER (RCG[9:0]) hold time to rising
PMA_RX_CLK
tTRDXKH
2
1.5
—
ns
RX_CLK clock rise time VIL(min) to VIH(max)
tTRXR
0.7
—
2.4
ns
RX_CLK clock fall time VIH(max) to VIL(min)
tTRXF
0.7
—
2.4
ns
Notes:
1. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTRDVKH symbolizes TBI receive timing
(TR) with respect to the time data input signals (D) reach the valid state (V) relative to the tTRX clock reference (K) going to
the high (H) state or setup time. Also, tTRDXKH symbolizes TBI receive timing (TR) with respect to the time data input signals
(D) went invalid (X) relative to the tTRX clock reference (K) going to the high (H) state. In general, the clock reference symbol
is based on three letters representing the clock of a particular function. For example, the subscript of tTRX represents the TBI
(T) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall). For
symbols representing skews, the subscript SK followed by the clock that is being skewed (TRX).
2. Setup and hold time of even numbered RCG are measured from the riding edge of PMA_RX_CLK1. Setup and hold times
of odd-numbered RCG are measured from the riding edge of PMA_RX_CLK0.
GTX_CLK
TXD[7:0]
tTTX
tTTXH
tTTXR
tTTXF
tTTKHDX
TX_EN
TX_ER
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MPC8347ECVRAJDB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECVRAJFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECVRALDB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
| MPC8347ECVRALFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications |
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