參數(shù)資料
型號: MPC8309CVMAHFCA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 417 MHz, RISC PROCESSOR, PBGA489
封裝: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, PLASTIC, MAPBGA-489
文件頁數(shù): 28/81頁
文件大小: 484K
代理商: MPC8309CVMAHFCA
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
34
Freescale Semiconductor
PCI
11.2
PCI AC Electrical Specifications
This section describes the general AC timing parameters of the PCI bus of the MPC8309. Note that the
PCI_CLK or PCI_SYNC_IN signal is used as the PCI input clock depending on whether the MPC8309 is
configured as a host or agent device. Table 33 shows the PCI AC timing specifications at 66 MHz.
.
Table 34 shows the PCI AC timing specifications at 33 MHz.
Low-level output voltage
VOL
OVDD = min,
IOL = 100 A
—0.2
V
Input current
IIN
0 V
VIN OVDD
±5
A
Notes:
1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
2. Ranges listed do not meet the full range of the DC specifications of the PCI 2.3 Local Bus Specifications.
Table 33. PCI AC Timing Specifications at 66 MHz
Parameter
Symbol1
Min
Max
Unit
Notes
Clock to output valid
tPCKHOV
—6.0
ns
2
Output hold from clock
tPCKHOX
1—
ns
2
Clock to output high impedance
tPCKHOZ
—14
ns
2, 3
Input setup to clock
tPCIVKH
3.0
ns
2, 4
Input hold from clock
tPCIXKH
0
ns
2, 4
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tPCIVKH symbolizes PCI timing
(PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN clock, tSYS, reference
(K) going to the high (H) state or setup time. Also, tPCRHFV symbolizes PCI timing (PC) with respect to the time hard reset
(R) went high (H) relative to the frame signal (F) going to the valid (V) state.
2. See the timing measurement conditions in the PCI 2.3 Local Bus Specifications.
3. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
4. Input timings are measured at the pin.
Table 34. PCI AC Timing Specifications at 33 MHz
Parameter
Symbol1
Min
Max
Unit
Notes
Clock to output valid
tPCKHOV
—11
ns
2
Output hold from clock
tPCKHOX
2—
ns
2
Clock to output high impedance
tPCKHOZ
—14
ns
2, 3
Table 32. PCI DC Electrical Characteristics1,2
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