參數(shù)資料
型號(hào): MPC7410RX450LX
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 28/44頁
文件大?。?/td> 885K
代理商: MPC7410RX450LX
34
MPC7410 RISC Microprocessor Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
System Design Information
Figure 21. Alternate Driver Impedance Measurement Circuit
Table 16 summarizes the signal impedance results. The driver impedance values were characterized at 0°,
65°, and 105°C. The impedance increases with junction temperature and is relatively unaffected by bus
voltage.
Table 16. Impedance Characteristics
Vdd = 1.8 V, OVdd = 2.5 V or OVdd = 1.8 V, Tj = 0 – 105°C
1.8.7 Pull-up Resistor Requirements
The MPC7410 requires high-resistive (weak: 10 k
) pull-up resistors on several control pins of the bus
interface to maintain the control signals in the negated state after they have been actively negated and
released by the MPC7410 or other bus masters. These pins are TS, ARTRY, SHDO, and SHD1.
In addition, the MPC7410 has one open-drain style output that requires a pull-up resistor (weak or stronger:
4.7 k
–10 k) if it is used by the system. This pin is CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes may not be driven by any master and
may therefore float in the high-impedance state for relatively long periods of time. Since the MPC7410 must
continually monitor these signals for snooping, this float condition may cause excessive power draw by the
input receivers on the MPC7410 or by other receivers in the system. It is recommended that these signals
be pulled up through weak (10 k
) pull-up resistors by the system, or that they may be otherwise driven by
the system during inactive periods of the bus. The snooped address and transfer attribute inputs are: A[0:31],
AP[0:3], TT[0:4], CI, WT, and GBL.
In systems where GBL is not connected and another devices may be asserting TS for a snoopable transaction
while not driving GBL to the processor, we recommend that a strong (1 k
) pull-up resistor be used on
GBL.
The data bus input receivers are normally turned off when no read operation is in progress and, therefore,
do not require pull-up resistors on the bus. Other data bus receivers in the system, however, may require
pull-ups, or that those signals be otherwise driven by the system during inactive periods by the system. The
data bus signals are: D[0:63], DP[0:7].
Impedance
Processor Bus
L2 Bus
Unit
Pull Up
41.5–54.3
42.7–54.1
ohms
Pull Down
37.3–55.3
39.3–50.0
ohms
(L2)OVdd
BGA
Data
Pin
Vforce
OGND
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