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| 型號： | MPC7410RX450LX |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 12/44頁 |
| 文件大?。?/td> | 885K |
| 代理商： | MPC7410RX450LX |
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2
MPC7410 RISC Microprocessor Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Overview
1.1 Overview
The MPC7410 is the second implementation of the fourth generation (G4) of PowerPC microprocessors
from Motorola. The MPC7410 implements the full PowerPC 32-bit architecture and is targeted at both
computing and embedded systems applications.
Some comments on the MPC7410 with respect to MPC750:
The MPC7410 adds an implementation of the new AltiVec technology instruction set
The MPC7410 includes significant improvements in memory subsystem (MSS) bandwidth and
offers an optional, high-bandwidth MPX bus interface
The MPC7410 adds full hardware-based multiprocessing capability, including a 5-state cache
coherency protocol (four MESI states plus a fifth state for shared intervention)
The MPC7410 is implemented in a next generation process technology for core frequency
improvement
The MPC7410 floating-point unit has been improved to make latency equal for double-precision
and single-precision operations involving multiplication
The completion queue has been extended to eight slots
There are no other significant changes to scalar pipelines, decode/dispatch/completion mechanisms,
or the branch unit. The MPC750 four-stage pipeline model is unchanged (fetch, decode/dispatch,
execute, complete/writeback)
Some comments on the MPC7410 with respect to MPC7400:
The MPC7410 adds configurable direct mapped SRAM capability to the L2 cache interface
The MPC7410 adds 32-bit interface support to the L2 cache interface. The MPC7410 implements
a 19th L2 address pin (L2ASPARE on the MPC7400) in order to support additional address range
The MPC7410 removes support for 3.3 V IO on the L2 cache interface
Figure 1 shows a block diagram of the MPC7410.
1.2 Features
This section summarizes features of the MPC7410 implementation of the PowerPC architecture. Major
features of the MPC7410 are as follows:
Branch processing unit
— Four instructions fetched per clock
— One branch processed per cycle (plus resolving two speculations)
— Up to one speculative stream in execution, one additional speculative stream in fetch
— 512-entry branch history table (BHT) for dynamic prediction
— 64-entry, 4-way set associative Branch Target Instruction Cache (BTIC) for eliminating branch
delay slots
Dispatch unit
— Full hardware detection of dependencies (resolved in the execution units)
— Dispatch two instructions to eight independent units (system, branch, load/store, fixed-point
unit 1, fixed-point unit 2, floating-point, AltiVec permute, AltiVec ALU)
— Serialization control (predispatch, postdispatch, execution serialization)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC7410RX450NE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC7410 RISC Microprocessor Hardware Specifications Addendum |
| MPC7410RX500LE | 功能描述:IC MPU 32BIT 500MHZ PPC 360-CBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC74xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
| MPC7410THX400LE | 功能描述:微處理器 - MPU NT HITCE RV1.4 1.8V -40C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC7410THX400NE | 制造商:Freescale Semiconductor 功能描述:MPU MPC74XX RISC 64BIT 0.18UM 400MHZ 1.8V/2.5V/3.3V 360FCCBG - Bulk |
| MPC7410THX450NE | 功能描述:微處理器 - MPU NT NITCE RV1.4,1.8V -40C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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