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| 型號： | MPC7400RX333LX |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 333 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 28/44頁 |
| 文件大小： | 504K |
| 代理商： | MPC7400RX333LX |
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34
MPC7400 RISC Microprocessor Hardware Specications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
System Design Information
Johnson in High Speed Digital Design: A Handbook of Black Magic (Prentice Hall, 1993) and contrary to
previous recommendations for decoupling PowerPC microprocessors, multiple small capacitors of equal
value are recommended over using multiple values of capacitance.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the Vdd, L2OVdd, and OVdd planes, to enable quick recharging of the smaller chip capacitors.
These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the quick
response time necessary. They should also be connected to the power and ground planes through two vias
to minimize inductance. Suggested bulk capacitors—100-330 F (AVX TPS tantalum or Sanyo OSCON).
1.8.5 Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. Unused active low inputs should be tied to OVdd. Unused active high inputs should be connected to
GND. All NC (no-connect) signals must remain unconnected.
Power and ground connections must be made to all external Vdd, OVdd, L2OVdd, and GND pins of the
MPC7400.
See Section 1.4.2.3, “L2 Clock AC Specications” for a discussion of the L2SYNC_OUT and L2SYNC_IN
signals.
1.8.6 Output Buffer DC Impedance
The MPC7400 60x and L2 I/O drivers are characterized over process, voltage, and temperature. To measure
Z0, an external resistor is connected from the chip pad to OVdd or GND. Then, the value of each resistor is
varied until the pad voltage is OVdd/2 (see Figure 20).
The output impedance is the average of two components, the resistances of the pull-up and pull-down
devices. When Data is held low, SW2 is closed (SW1 is open), and RN is trimmed until the voltage at the
pad equals OVdd/2. RN then becomes the resistance of the pull-down devices. When Data is held high,
SW1 is closed (SW2 is open), and RP is trimmed until the voltage at the pad equals OVdd/2. RP then
becomes the resistance of the pull-up devices. RP and RN are designed to be close to each other in value.
Then Z0 = (RP + RN)/2.
Figure 20. Driver Impedance Measurement
OVdd
OGND
RP
RN
Pad
Data
SW1
SW2
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