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參數(shù)資料
| 型號： | MPC5668GF0AVMGR |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 116 MHz, MICROCONTROLLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, MO151AAF-1, MAPBGA-208 |
| 文件頁數(shù)： | 53/66頁 |
| 文件大?。?/td> | 889K |
| 代理商： | MPC5668GF0AVMGR |
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Electrical Characteristics
MPC5668x Microcontroller Data Sheet, Rev. 3
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
57
Figure 25. Media Local Bus (MLB) Timing
4.14.8
Fast Ethernet Interface
MII signals use CMOS signal levels compatible with devices operating at either 5.0 V or 3.3 V. Signals are not TTL compatible.
They follow the CMOS electrical characteristics.
4.14.8.1
MII Receive Signal Timing (RXD[3:0], RX_DV, RX_ER, and RX_CLK)
The receiver functions correctly up to a RX_CLK maximum frequency of 25 MHz +1%. There is no minimum frequency
requirement. In addition, the system clock frequency must exceed four times the RX_CLK frequency.
1 The Controller can shut off MLBCLK to place MLB in a low-power state.
2 Pulse width variation is measured at 1.25 V by triggering on one edge of MLBCLK and measuring the spread on the other
edge, measured in ns peak-to-peak (ns p-p).
3 The board must be designed to insure that the high-impedance bus does not leave the logic state of the final driven bit for this
time period. Therefore, coupling must be minimized while meeting the maximum capacitive load listed.
Table 33. MII Receive Signal Timing
Spec
Characteristic
Min
Max
Unit
M1
RXD[3:0], RX_DV, RX_ER to RX_CLK setup
5
—
ns
M2
RX_CLK to RXD[3:0], RX_DV, RX_ER hold
5
—
ns
M3
RX_CLK pulse width high
35%
65%
RX_CLK period
M4
RX_CLK pulse width low
35%
65%
RX_CLK period
MLBCLK
MLBSIG/
2
6
3
5
11
MLBDAT
(output)
10
4
valid data
MLBSIG/
MLBDAT
(input)
9
8
12
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5668x
products
in
208
and
256
MAPBGA
packages
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC5668GF0AVMJ | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5668x Microcontroller Data Sheet |
| MPC5668GF0AVMJR | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5668x Microcontroller Data Sheet |
| MPC5668GKITJ | 制造商:Freescale Semiconductor 功能描述:EVAL KIT FOR MPC5668 |
| MPC5668GNEXUSADP | 制造商:Freescale Semiconductor 功能描述:NEXUSADP 256TO208MAPBGA - Boxed Product (Development Kits) 制造商:Freescale Semiconductor 功能描述:ADAPTER FOR FULL NEXUS 制造商:Freescale Semiconductor 功能描述:ADAPTER BOARD, MPC5668G/E EVAL KIT, Accessory Type:Adapter Board, For Use With:M 制造商:Freescale Semiconductor 功能描述:ADAPTER BOARD, MPC5668G/E EVAL KIT, Accessory Type:Adapter Board, For Use With:MPC5668G/E Evaluation Kit, Features:256 MAPBGA Emulation Adapter Board for Nexus Access |
| MPC5668X | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5668x Microcontroller Data Sheet |
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