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參數(shù)資料
| 型號(hào)： | MPC5602PEFMLL |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-026BED, LQFP-100 |
| 文件頁數(shù)： | 40/72頁 |
| 文件大?。?/td> | 661K |
| 代理商： | MPC5602PEFMLL |
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MPC560xP Datasheet Data Sheet, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
45
CP1
CC ADC input pin
capacitance 1
—0.89
pF
CP2
CC ADC input pin
capacitance 2
—1
pF
CP3
CC ADC input pin
capacitance 3
—1
pF
RSW1
7,8 CC Internal resistance of
analog source
—0.6
k
Ω
RSW2
7,8 CC Internal resistance of
analog source
—0.7
k
Ω
RAD
CC Internal resistance of
analog source
—2
k
Ω
IINJ
Input current injection
Current injection on one ADC
input, different from the
converted one
-10
10
mA
INL
CC Integral Non Linearity
No overload
-1.5
1.5
LSB
DNL
CC Differential Non Linearity
No overload
-1.0
1.0
LSB
OFS
CC Offset error
After offset cancellation
-1.0
1.0
LSB
GNE
CC Gain error
-1.0
1.0
LSB
TUE
CC Total unadjusted error
After offset cancellation
-2.0
2.0
LSB
SINAD CC Signal to noise and
distortion
Max input dynamic, after offset
cancellation
55.9
—
dB
THD
CC Total harmonic distortion
Max input dynamic, after offset
cancellation
59
—
dB
ENOB
CC Effective number of bits
Max input dynamic, after offset
cancellation
9.0
—
bit
TUEP
CC Total Unadjusted Error for
precise channels, input
only pins
No overload
-2
2
LSB
TUEX
CC Total Unadjusted Error for
extended channel
No overload
-3
3
LSB
1 V
DD = 3.3 V to 3.6 V / 5.0 V to 5.5 V, TA = -40 to +125 °C, unless otherwise specified.
2 All values need to be confirmed during device validation.
3 AD_CK clock is always half of the ADC module input clock defined via the Magic Carpet auxiliary clock
divider for the ADC.
4 When configured to allow 60 MHz ADC, the minimum ADC clock speed is 9 MHz, below which precision is
lost.
5 This parameter does not include the sample time t
ADC_S, but only the time for determining the digital result
and the time to load the result’s register with the conversion result.
6 20 MHz ADC clock. Specific prescaler is programmed on MC_PLL_CLK to provide 20 MHz clock to the
ADC.
Table 25. ADC Conversion Characteristics (continued)
Symbol
Parameter
Conditions1
Value2
Unit
Min
Max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC5603PEFMLQ | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144 |
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| MPC603AFE66CB | 32-BIT, 66.67 MHz, RISC PROCESSOR, CQFP240 |
| MPC603AFE66CX | 32-BIT, 66.67 MHz, RISC PROCESSOR, CQFP240 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC5602S | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5606S Microcontroller Data Sheet |
| MPC5603B | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Qorivva MPC560xB/C/D Family |
| MPC5603BEMLL | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5604B/C Microcontroller Data Sheet |
| MPC5603BEMLLR | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5604B/C Microcontroller Data Sheet |
| MPC5603BEMLQ | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5604B/C Microcontroller Data Sheet |
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