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參數(shù)資料
| 型號： | MPC5534MVF66 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, PLASTIC, MO-151AAF-1, MAPBGA-208 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 1055K |
| 代理商： | MPC5534MVF66 |
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MPC5534 Microcontroller Data Sheet, Rev. 5
Electrical Characteristics
Freescale Semiconductor
24
Table 16 shows the FLASH_BIU settings versus frequency of operation. Refer to the device reference
manual for definitions of these bit fields.
3.12
AC Specifications
3.12.1
Pad AC Specifications
Table 16. FLASH_BIU Settings vs. Frequency of Operation1
1 Illegal combinations exist. Use entries from the same row in this table.
Target Maximum Frequency (MHz)
APC
RWSC
WWSC
DPFEN 2
2 For maximum flash performance, set to 0b1.
IPFEN 2
PFLIM 3
3 For maximum flash performance, set to 0b010.
BFEN 2
Up to and including 27 MHz 4, 5
4 27 MHz parts allow for 25 MHz system clock + 2% frequency modulation (FM).
5 The APC, RWSC, and WWSC combination requires setting the PRD bit to 1 in the flash MCR register.
0b000
0b01
0b0
0b1
0b0
0b1
0b000
to
0b010
0b0
0b1
Up to and including 52 MHz 6
6 52 MHz parts allow for 50 MHz system clock + 2% FM.
0b001
0b01
0b0
0b1
0b0
0b1
0b000
to
0b010
0b0
0b1
Up to and including 77 MHz 7
7 77 MHz parts allow for 75 MHz system clock + 2% FM.
0b010
0b01
0b0
0b1
0b0
0b1
0b000
to
0b010
0b0
0b1
Up to and including 82 MHz 8
8 82 MHz parts allow for 80 MHz system clock + 2% FM.
0b0119
9 For frequencies up to and including 80 MHz, if VDD is within ±5% of 1.5 V, then APC = RWSC = 0b010 is a valid setting.
0b0119
0b01
0b0
0b1
0b0
0b1
0b000
to
0b010
0b0
0b1
Reset values:
0b111
0b11
0b0
0b000
0b0
Table 17. Pad AC Specifications (VDDEH = 5.0 V, VDDE = 1.8 V)
1
Spec
Pad
SRC / DSC
(binary)
Out Delay 2, 3, 4
(ns)
Rise / Fall 4, 5
(ns)
Load Drive
(pF)
1
Slow high voltage (SH)
11
26
15
50
82
60
200
01
75
40
50
137
80
200
00
377
200
50
476
260
200
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