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參數(shù)資料
| 型號： | MPC505 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, RISC MICROCONTROLLER, PQFP16 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 68K |
| 代理商： | MPC505 |
Application Note
Example Interrupt Handler
AN1281
MOTOROLA
9
Save Previous
State
Since a non-maskable exception (like RESET) can occur just after an
interrupt takes place, the previous state of the machine (SRR0 and
SRR1) must be stored on the stack as a first step.
Only general-purpose registers (GPR) can be written to memory, so a
GPR is needed for temporary storage of SRR0 and SRR1.
Asynchronous exceptions, like interrupts, must treat all registers as non-
volatile — the contents must be preserved so they can be restored at the
end of the interrupt routine. Synchronous exceptions, like system call
instructions, can treat registers as in function or subroutine calls.
After initial stack functions, like creating a stack frame, the contents of
the GPR used for temporary storage must be saved on the stack. After
that, the code to save SRR0 and SRR1 on the stack using GPR4 as
temporary storage and a predefined GPR as a stack pointer (SP) could
look like:
mfspr
gpr4, SRR0
# move spr SRR0 to gpr4
stw
spr4, 12 (SP)
# store SRR0 value 12 bytes above SP
mfspr
gpr4, SRR1
# move spr SRR1 to gpr4
stw
gpr4, 16 (SP)
# store SRR1 value 16 bytes above SP
Table 4. Interrupt Handler
Step
Action
Registers Used
1
Save previous state
SRR0, SRR1, one GPR
2
Set the recoverable interrupt bit
EID
3
Identify interrupt source
IRQAND, one GPR
4
Branch to handler
None
5
Perform handler functions
Varies
6
Housekeeping
PQEDGDAT, NRI,
SRR0, SRR1, GPR(s)
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