參數(shù)資料
型號(hào)： MMC2075
廠商： Motorola, Inc.
英文描述： Integrated Processor with Roaming FLEX Decoder
中文描述： 綜合處理器漫游FLEX解碼器
文件頁(yè)數(shù)： 24/34頁(yè)
文件大?。?/td> 768K
代理商： MMC2075
24
MMC2080/2075 Technical Data
Preliminary
Tables of Signals
Table 9. Development Extensions (208-Pin Package)
Signal Name
Dir
N
I/O Cell
Description
D[31:16]
I/O
N
IOHPPH
Extension to provide a 32-bit external bus. The bus is enabled when
either DVL0 or _DVL0 is asserted.
DVLEB[1:0]
I/O
N
IOHPPH
Byte Enable
(active low)
—
Input when BGNT is low; otherwise
output. DVLEB0 enables D[31:24] and DVLEB1 enables D[23:16].
DVL[1:0]
I
N
INHPP
Development Mode
—
When DVL1 is low, the internal ROM is
bypassed. If the ROM space is addressed when DVL1 is low and
XBOOT is high, the 32-bit extension is enabled and DVLSEL is
asserted to select an external memory.
When DVL0 is low, the 32-bit bus extension is enabled for external
bus masters (BGNT is low) and for debug monitor modes.
DVLSEL
O
N
OTP
Development Select
(active low)
—
When DVL1 is low and XBOOT
is high, this output is asserted when the internal ROM locations are
addressed.
DVLMX
I
N
INHPP
Selects the output of DSTAT[5:0].
DSTAT[5:0]
O
N
OTP
When DVLMX is high, DSTAT is the low-order 6 bits of the interrupt
vector. When DVLMX is low, DSTAT[3:0] is the M
CORE pipeline
status, PSTAT[3:0], and DSTAT[5:4] is the transfer size in M
CORE
format.
TC[2:0]
O
N
OTP
Processor Transfer Code
.
TEA
I
N
INHPP
Transfer Error Acknowledge
(active low).
HIGHZ
I
N
INHPP
Tri-State Disable
(active low)
—
When asserted (low), all tri-state
outputs are disabled (high-z). This performs the same function as
the JTAG HIGHZ command.
PULL_EN
I
N
INHPP
Enable Pull-up Resistors
—
When low, all pull-up resistors (except
the pull-up resistor on this I/O cell) are disabled.
SHS
O
N
OTP
Show Cycle Strobe (active low)
—
Strobes low when data is valid.
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