參數(shù)資料
型號(hào): MM908E425AIDWB
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Integrated Quad Half H-Bridge with Power Supply, Embedded MCU, and LIN Serial Communication
中文描述: 綜合四半僅符合電源橋,嵌入式微控制器和LIN串行通信
文件頁(yè)數(shù): 36/49頁(yè)
文件大小: 490K
代理商: MM908E425AIDWB
Analog Integrated Circuit Device Data
Freescale Semiconductor
36
908E425
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SYSTEM CONTROL REGISTER (SYSCTL)
POWER STAGES ON BIT (PSON )
This read / write bit enables the power stages (half-bridges,
high side, LIN transmitter, Analog Input PA1 current sources,
and HVDD output). Reset clears the PSON bit.
1 = Power stages enabled.
0 = Power stages disabled.
LIN SLEW RATE SELECTION BITS (SRS0 : SRS1 )
These read write bits enable the user to select the
appropriate LIN slew rate for different baud rate
configurations as shown in
Table 11
.
The high speed slew rates are used, for example, for
programming via the LIN and are not intended for use in the
application.
GO TO STOP MODE BIT (GS )
This write-only bit instructs the 908E425 to power down
and go into STOP mode.
Reset or CPU interrupt requests
clear the GS bit.
1 = Power down and go into STOP mode
0 = Not in STOP mode
SYSTEM STATUS REGISTER (SYSSTAT)
HALL-EFFECT SENSOR INPUT PIN OVERCURRENT
FLAG BIT (HP_OCF )
This read / write flag is set on an overcurrent condition at
one of the Hall-effect sensor input pins. Clear HP_OCF and
enable the output by writing a Logic [1] to the HP_OCF flag.
Reset clears the HP_OCF bit. Writing a Logic [0] to HP_OCF
has no effect.
1 = Overcurrent condition on Hall-effect sensor input pin
has occurred
0 = No overcurrent condition on Hall-effect sensor input
pin has occurred
LIN CURRENT LIMITATION BIT (LINCL)
This read-only bit is set if the LIN transmitter operates in
current limitation region. Due to excessive power dissipation
in the transmitter, software is advised to turn the transmitter
off immediately.
1 = Transmitter operating in current limitation region
0 = Transmitter not operating in current limitation region
HVDD OUTPUT OVERCURRENT FLAG BIT (HVDD_OCF )
This read / write flag is set on an overcurrent condition at
the HVDD pin. Clear HVDD_OCF and enable the output by
writing a Logic [1] to the HVDD_OCF Flag. Reset clears the
HVDD_OCF bit. Writing a Logic [0] to HVDD_OCF has no
effect.
1 = Overcurrent condition on HVDD has occurred
0 = No overcurrent condition on HVDD has occurred
HIGH-SIDE OVERCURRENT FLAG BIT (HS_OCF )
This read / write flag is set on an overcurrent condition at
the high-side driver. Clear HS_OCF and enable the high-side
driver by writing a Logic [1] to HS_OCF. Reset clears the
HS_OCF bit. Writing a Logic [0] to HS_OCF has no effect.
1 = Overcurrent condition on high-side drivers has
occurred
0 = No overcurrent condition on high-side drivers has
occurred
LOW-VOLTAGE BIT (LVF )
This read only bit is a copy of the LVF bit in the Interrupt
Flag Register.
1 = Low-voltage condition has occurred
0 = No low-voltage condition has occurred
HIGH-VOLTAGE SENSOR BIT (HVF )
This read-only bit is a copy of the HVF bit in the Interrupt
Flag Register.
1 = High-voltage condition has occurred
0 = No high-voltage condition has occurred
H-BRIDGE OVERCURRENT FLAG BIT (HB_OCF )
This read write flag is set on an overcurrent condition at
the H-Bridges. Clear HB_OCF and enable the H-Bridge
Register Name and Address: SYSCTL - $03
Bit s
7
6
5
4
3
2
1
0
Read
PSON
SRS1
SRS0
0
0
0
0
0
Write
GS
Reset
0
0
0
0
0
0
0
0
Table 11. LIN Slew Rate Selection Bits
SRS1
SRS0
LIN Slew Rate
0
0
Initial Slew Rate (20 kBaud)
0
1
Slow Slew Rate (10 kBaud)
1
0
High Speed II (8 x)
1
1
High Speed I (4 x)
Register Name and Address: SYSSTAT - $0c
Bit s
7
6
5
4
3
2
1
0
Read
HP_OCF LINCL HVDD_OCF HS_OCF
LVF HVF HB_OCF HTF
Write
Reset
0
0
0
0
0
0
0
0
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