參數(shù)資料
型號： MCP3221
廠商： Microchip Technology Inc.
英文描述： 560KBITS BRAM 400000 SYSTEM GATES 404 I/ - NOT RECOMMENDED for NEW DESIGN
中文描述： 低功耗12位A / D轉(zhuǎn)換器具有I2C⑩接口
文件頁數(shù)： 2/27頁
文件大?。?/td> 520K
代理商： MCP3221
MCP3221
DS21732B-page 2
2003 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
V
DD
...................................................................................7.0V
Analog input pin w.r.t. V
SS
.......... ............. -0.6V to V
DD
+0.6V
SDA and SCL pins w.r.t. V
SS
........... .........-0.6V to V
DD
+1.0V
Storage temperature.....................................-65°C to +150°C
Ambient temp. with power applied................-65°C to +125°C
Maximum Junction Temperature...................................150°C
ESD protection on all pins (HBM) .................................
≥
4 kV
Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating
only and functional operation of the device at those or any
other conditions above those indicated in the operational list-
ings of this specification is not implied. Exposure to maximum
rating conditions for extended periods may affect device reli-
ability.
PIN FUNCTION TABLE
Name
Function
V
DD
V
SS
AIN
SDA
SCL
+2.7V to 5.5V Power Supply
Ground
Analog Input
Serial Data In/Out
Serial Clock In
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise noted, all parameters apply at V
DD
= 5.0V, V
SS
= GND, R
PU
= 2 k
T
AMB
= -40°C to +85°C, I
2
C Fast Mode Timing: f
SCL
= 400 kHz (
Note 3
).
Parameters
Sym
Min
Typ
Max
Units
Conditions
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Dynamic Performance
Total Harmonic Distortion
Signal-to-Noise and Distortion
Spurious-Free Dynamic Range
Analog Input
Input Voltage Range
Leakage Current
SDA/SCL (open-drain output):
Data Coding Format
High-level input voltage
Low-level input voltage
Low-level output voltage
Hysteresis of Schmitt trigger inputs
Note 1:
“Sample time” is the time between conversions once the address byte has been sent to the converter.
Refer to Figure 5-6.
2:
This parameter is periodically sampled and not 100% tested.
3:
R
PU
= Pull-up resistor on SDA and SCL.
4:
SDA and SCL = V
SS
to V
DD
at 400 kHz.
5:
t
ACQ
and t
CONV
are dependent on internal oscillator timing. See Figure 5-5 and Figure 5-6 for relation to
SCL.
12
bits
LSB
LSB
LSB
LSB
INL
DNL
—
—
—
—
±0.75
±0.5
±0.75
-1
±2
±1
±2
±3
No missing codes
THD
SINAD
SFDR
—
—
—
-82
72
86
—
—
—
dB
dB
dB
V
IN
= 0.1V to 4.9V @ 1 kHz
V
IN
= 0.1V to 4.9V @ 1 kHz
V
IN
= 0.1V to 4.9V @ 1 kHz
V
SS
-0.3
-1
—
—
V
DD
+0.3
+1
V
μA
2.7V
≤
V
DD
≤
5.5V
Straight Binary
0.7 V
DD
—
—
—
0.05 V
DD
V
IH
V
IL
V
OL
V
HYST
—
—
—
—
V
V
V
V
0.3 V
DD
0.4
—
I
OL
= 3 mA, R
PU
= 1.53 k
f
SCL
= 400 kHz only
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