參數(shù)資料
型號： MCP3221
廠商： Microchip Technology Inc.
英文描述： 560KBITS BRAM 400000 SYSTEM GATES 404 I/ - NOT RECOMMENDED for NEW DESIGN
中文描述： 低功耗12位A / D轉(zhuǎn)換器具有I2C⑩接口
文件頁數(shù)： 14/27頁
文件大?。?/td> 520K
代理商： MCP3221
MCP3221
DS21732B-page 14
2003 Microchip Technology Inc.
4.5
Differential Non-Linearity (DNL)
In the ideal A/D converter transfer function, each code
has a uniform width. That is, the difference in analog
input voltage is constant from one code transition point
to the next. Differential nonlinearity (DNL) specifies the
deviation of any code in the transfer function from an
ideal code width of 1 LSB. The DNL is determined by
subtracting the locations of successive code transition
points after compensating for any gain and offset
errors. A positive DNL implies that a code is longer than
the ideal code width, while a negative DNL implies that
a code is shorter than the ideal width.
4.6
Integral Non-Linearity (INL)
Integral nonlinearity (INL) is a result of cumulative DNL
errors and specifies how much the overall transfer
function deviates from a linear response. The method
of measurement used in the MCP3221 A/D converter
to determine INL is the “end-point” method.
4.7
Offset Error
Offset error is defined as a deviation of the code transi-
tion points that are present across all output codes.
This has the effect of shifting the entire A/D transfer
function. The offset error is measured by finding the dif-
ference between the actual location of the first code
transition and the desired location of the first transition.
The ideal location of the first code transition is located
at 1/2 LSB above V
SS
.
4.8
Gain Error
The gain error determines the amount of deviation from
the ideal slope of the A/D converter transfer function.
Before the gain error is determined, the offset error is
measured and subtracted from the conversion result.
The gain error can then be determined by finding the
location of the last code transition and comparing that
location to the ideal location. The ideal location of the
last code transition is 1.5 LSBs below full-scale or V
DD
.
4.9
Conversion Current (I
DD
)
The average amount of current over the time required
to perform a 12-bit conversion.
4.10
Active Bus Current (I
DDA
)
The average amount of current over the time required
to monitor the I
2
C bus. Any current the device con-
sumes while it is not being addressed is referred to as
“Active Bus” current.
4.11
Standby Current (I
DDS
)
The average amount of current required while no con-
version is occurring and while no data is being output
(i.e., SCL and SDA lines are quiet).
4.12
I
2
C Standard Mode Timing
I
2
C specification where the frequency of SCL is
100 kHz.
4.13
I
2
C Fast Mode Timing
I
2
C specification where the frequency of SCL is
400 kHz.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCP3221_06 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface
MCP3221A0-E/OT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface
MCP3221A0-I/OT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface
MCP3221A0T-E/OT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-bit ADC I2C Single Channel RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MCP3221A0T-I/OT 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface
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