- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11598 > MCP2510-I/P (Microchip Technology)IC CAN CONTRLER IND TEMP 18DIP PDF資料下載
參數(shù)資料
| 型號(hào)： | MCP2510-I/P |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 74/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CAN CONTRLER IND TEMP 18DIP |
| 產(chǎn)品培訓(xùn)模塊： | CAN Bus Protection |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 控制器類型： | CAN 接口 |
| 接口： | SPI |
| 電源電壓： | 3 V ~ 5.5 V |
| 電流 - 電源： | 10mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 18-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 18-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 685 (CN2011-ZH PDF) |
| 配用： | DV251001-ND - KIT DEVELOPMENT CAN MCP2510 |
| 其它名稱： | Q731310 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁當(dāng)前第74頁第75頁第76頁第77頁第78頁第79頁第80頁
PIC18F2480/2580/4480/4580
DS39637D-page 76
2009 Microchip Technology Inc.
FIGURE 6-7:
USE OF THE BANK SELECT REGISTER (DIRECT ADDRESSING)
6.3.2
ACCESS BANK
While the use of the BSR with an embedded 8-bit
address allows users to address the entire range of
data memory, it also means that the user must always
ensure that the correct bank is selected. Otherwise,
data may be read from or written to the wrong location.
This can be disastrous if a GPR is the intended target
of an operation, but an SFR is written to instead.
Verifying and/or changing the BSR for each read or
write to data memory can become very inefficient.
To streamline access for the most commonly used data
memory locations, the data memory is configured with
an Access Bank, which allows users to access a
mapped block of memory without specifying a BSR.
The Access Bank consists of the first 128 bytes of
memory (00h-7Fh) in Bank 0 and the last 128 bytes of
memory (80h-FFh) in Block 15. The lower half is known
as the “Access RAM” and is composed of GPRs. The
upper half is where the device’s SFRs are mapped.
These two areas are mapped contiguously in the
Access Bank and can be addressed in a linear fashion
by an 8-bit address (Figure 6-6).
The Access Bank is used by core PIC18 instructions
that include the Access RAM bit (the ‘a(chǎn)’ parameter in
the instruction). When ‘a(chǎn)’ is equal to ‘1’, the instruction
uses the BSR and the 8-bit address included in the
opcode for the data memory address. When ‘a(chǎn)’ is ‘0’
however, the instruction is forced to use the Access
Bank address map; the current value of the BSR is
ignored entirely.
Using this “forced” addressing allows the instruction to
operate on a data address in a single cycle, without
updating the BSR first. For 8-bit addresses of 80h and
above, this means that users can evaluate and operate
on SFRs more efficiently. The Access RAM below 80h
is a good place for data values that the user might need
to access rapidly, such as immediate computational
results or common program variables. Access RAM
also allows for faster and more code efficient context
saving and switching of variables.
The mapping of the Access Bank is slightly different
when the extended instruction set is enabled (XINST
Configuration bit = 1). This is discussed in more detail
6.3.3
GENERAL PURPOSE
REGISTER FILE
PIC18 devices may have banked memory in the GPR
area. This is data RAM, which is available for use by all
instructions. GPRs start at the bottom of Bank 0
(address 000h) and grow upwards towards the bottom
of the SFR area. GPRs are not initialized by a
Power-on Reset and are unchanged on all other
Resets.
Note 1:
The Access RAM bit of the instruction can be used to force an override of the selected bank (BSR<3:0>) to
the registers of the Access Bank.
2:
The MOVFF instruction embeds the entire 12-bit address in the instruction.
Data Memory
Bank Select(2)
7
0
From Opcode(2)
00
0 0
000h
100h
200h
300h
F00h
E00h
FFFh
Bank 0
Bank 1
Bank 2
Bank 14
Bank 15
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
Bank 3
through
Bank 13
00 1
1
1 1 1 1
111
7
0
BSR(1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ENC28J60-I/SO | IC ETHERNET CTRLR W/SPI 28SOIC |
| ENC28J60/SS | IC ETHERNET CTRL 8K W/SPI 28SSOP |
| D38999/20MG75PN | CONN RCPT 4POS WALL MNT W/PINS |
| V48C28M75BG | CONVERTER MOD DC/DC 28V 75W |
| D38999/20JG75PA | CONN RCPT 4POS WALL MNT W/PINS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP2510ISO | 制造商:Microchip Technology Inc 功能描述: |
| MCP2510-ISO | 制造商:Microchip Technology Inc 功能描述: |
| MCP2510-IST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone CAN Controller with SPI Interface |
| MCP2510I-ST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone CAN Controller with SPIa?￠ Interface |
| MCP2510T-/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Stand-Alone CAN Controller with SPI⑩ Interface |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。