參數(shù)資料
型號(hào): MCP2510-I/P
廠商: Microchip Technology
文件頁數(shù): 70/80頁
文件大?。?/td> 0K
描述: IC CAN CONTRLER IND TEMP 18DIP
產(chǎn)品培訓(xùn)模塊: CAN Bus Protection
標(biāo)準(zhǔn)包裝: 25
控制器類型: CAN 接口
接口: SPI
電源電壓: 3 V ~ 5.5 V
電流 - 電源: 10mA
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 18-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 18-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 685 (CN2011-ZH PDF)
配用: DV251001-ND - KIT DEVELOPMENT CAN MCP2510
其它名稱: Q731310
PIC18F2480/2580/4480/4580
DS39637D-page 72
2009 Microchip Technology Inc.
6.2.3
INSTRUCTIONS IN PROGRAM
MEMORY
The program memory is addressed in bytes. Instruc-
tions are stored as two bytes or four bytes in program
memory. The Least Significant Byte of an instruction
word is always stored in a program memory location
with an even address (LSB = 0). To maintain alignment
with instruction boundaries, the PC increments in steps
of 2 and the LSB will always read ‘0’ (see Section 6.1.1
Figure 6-4 shows an example of how instruction words
are stored in the program memory.
The CALL and GOTO instructions have the absolute pro-
gram memory address embedded into the instruction.
Since instructions are always stored on word bound-
aries, the data contained in the instruction is a word
address. The word address is written to PC<20:1>,
which accesses the desired byte address in program
memory. Instruction #2 in Figure 6-4 shows how the
instruction, GOTO 0006h, is encoded in the program
memory. Program branch instructions, which encode a
relative address offset, operate in the same manner. The
offset value stored in a branch instruction represents the
number of single-word instructions that the PC will be
provides further details of the instruction set.
FIGURE 6-4:
INSTRUCTIONS IN PROGRAM MEMORY
6.2.4
TWO-WORD INSTRUCTIONS
The standard PIC18 instruction set has four, two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instructions always has
‘1111’ as its four Most Significant bits; the other 12 bits
are literal data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction spec-
ifies a special form of NOP. If the instruction is executed
in proper sequence – immediately after the first word –
the data in the second word is accessed and used by
the instruction sequence. If the first word is skipped for
some reason and the second word is executed by itself,
a NOP is executed instead. This is necessary for cases
when the two-word instruction is preceded by a condi-
tional instruction that changes the PC. Example 6-4
shows how this works.
EXAMPLE 6-4:
TWO-WORD INSTRUCTIONS
Word Address
LSB = 1
LSB = 0
Program Memory
Byte Locations
000000h
000002h
000004h
000006h
Instruction 1:
MOVLW
055h
0Fh
55h
000008h
Instruction 2:
GOTO
0006h
EFh
03h
00000Ah
F0h
00h
00000Ch
Instruction 3:
MOVFF
123h, 456h
C1h
23h
00000Eh
F4h
56h
000010h
000012h
000014h
Note:
mation on two-word instructions in the
extended instruction set.
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; No, skip this word
1111 0100 0101 0110
; Execute this word as a NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; Yes, execute this word
1111 0100 0101 0110
; 2nd word of instruction
0010 0100 0000 0000
ADDWF
REG3
; continue code
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