參數(shù)資料
型號: MCIMX357CJM5B
廠商: Freescale Semiconductor
文件頁數(shù): 105/147頁
文件大小: 0K
描述: MPU MX35 ARM11 400-MAPBGA
標準包裝: 90
系列: i.MX35
核心處理器: ARM11
芯體尺寸: 32-位
速度: 532MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲器類型: ROMless
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.33 V ~ 1.47 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 10
Freescale Semiconductor
60
Figure 38. eSDHCv2 Timing
Table 47. eSDHCv2 Interface Timing Specification
ID
Parameter
Symbols Min. Max. Unit
Card Input Clock
SD1 Clock frequency (Low Speed)
fPP
1
1 In low-speed mode, the card clock must be lower than 400 kHz, voltage ranges from 2.7 to 3.6 V.
0400
kHz
Clock frequency (SD/SDIO Full Speed/High Speed)
fPP
2
2 In normal-speed mode for the SD/SDIO card, clock frequency can be any value between 0–25 MHz. In high-speed mode,
clock frequency can be any value between 0–50 MHz.
0
25/50 MHz
Clock frequency (MMC Full Speed/High Speed)
fPP
3
3 In normal-speed mode for MMC card, clock frequency can be any value between 0 and 20 MHz. In high-speed mode, clock
frequency can be any value between 0–52 MHz.
0
20/52 MHz
Clock frequency (Identification Mode)
fOD
100
400
kHz
SD2 Clock Low time
tWL
7—
ns
SD3 Clock high time
tWH
7—
ns
SD4 Clock rise time
tTLH
—3
ns
SD5 Clock fall time
tTHL
—3
ns
eSDHC Output/Card Inputs CMD, DAT (Reference to CLK)
SD6 eSDHC output delay
tOD
–3
3
ns
eSDHC Input/Card Outputs CMD, DAT (Reference to CLK)
SD7 eSDHC input setup time
tISU
5—
ns
SD8 eSDHC input hold time
tIH
4
4 To satisfy hold timing, the delay difference between clock input and cmd/data input must not exceed 2 ns.
2.5
ns
SD1
SD3
SD5
SD4
SD7
SDHCx_CMD
output from eSDHCv2 to card
SDHCx_DAT_1
SDHCx_DAT_7
SDHCx_DAT_0
output from card to eSDHCv2
SDHCx_CLK
SD2
SD8
SD6
SDHCx_CMD
SDHCx_DAT_1
SDHCx_DAT_7
SDHCx_DAT_0
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