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List of Memory Maps
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
A-4
Freescale Semiconductor
Table A-7. QSPI Module Memory Map
MBAR
Offset
[31:24]
[23:16]
[15:8]
[7:0]
0x00A0
QSPI Mode Register (QMR)
Reserved
0x00A4
QSPI Delay Register (QDLYR)
Reserved
0x00A8
QSPI Wrap Register (QWR)
Reserved
0x00AC
QSPI Interrupt Register (QIR)
Reserved
0x00B0
QSPI Address Register (QAR)
Reserved
0x00B4
QSPI Data Register (QDR)
Reserved
Table A-8. PWM Module Memory Map
MBAR
Offset
[31:24]
[23:16]
[15:8]
[7:0]
0x00C0
PWM Control Register 1
(PWCR1)
Reserved
0x00C4
PWM Control Register 2
(PWCR2)
Reserved
0x00C8
PWM Control Register 3
(PWCR3)
Reserved
0x00D0
PWM Pulse-Width Register
1 (PWWD1)
Reserved
0x00D4
PWM Pulse-Width Register
2 (PWWD2)
Reserved
0x00D8
PWM Pulse-Width Register
3 (PWWD3)
Reserved
Table A-9. DMA Module Memory Map
MBAR
Offset
[31:24]
[23:16]
[15:8]
[7:0]
0x00E0
DMA Mode Register (DCMR)
0x00E6
DMA Interrupt Register (DCIR)
0x00E8
DMA Byte Count Register (DBCR)
0x00EC
DMA Source Address Register (DSAR)
0x00F0
DMA Destination Address Register (DDAR)