參數(shù)資料
型號(hào): MCF5270
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 32-bit Embedded Controller Division
中文描述: 32位嵌入式控制器部
文件頁數(shù): 5/56頁
文件大?。?/td> 1096K
代理商: MCF5270
Features
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2
Freescale Semiconductor
5
— Data formats can be 5, 6, 7 or 8 bits with even, odd or no parity
— Up to 2 stop bits in 1/16 increments
— Error-detection capabilities
— Modem support includes request-to-send (URTS) and clear-to-send (UCTS) lines for two
UARTs
— Transmit and receive FIFO buffers
I
2
C Module
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads
— Fully compatible with industry-standard I
2
C bus
— Master or slave modes support multiple masters
— Automatic interrupt generation with programmable level
Queued Serial Peripheral Interface (QSPI)
— Full-duplex, three-wire synchronous transfers
— Up to four chip selects available
— Master mode operation only
— Programmable master bit rates
— Up to 16 pre-programmed transfers
Four 32-bit DMA Timers
— 20-ns resolution at 50 MHz
— Programmable sources for clock input, including an external clock option
— Programmable prescaler
— Input-capture capability with programmable trigger edge on input pin
— Output-compare with programmable mode for the output pin
— Free run and restart modes
— Maskable interrupts on input capture or reference-compare
— DMA trigger capability on input capture or reference-compare
Four Periodic Interrupt Timers (PITs)
— 16-bit counter
— Selectable as free running or count down
Software Watchdog Timer
— 16-bit counter
— Low power mode support
Frequency Modulated Phase Locked Loop (PLL)
— Crystal or external oscillator reference
— 8 to 25 MHz reference frequency for normal PLL mode
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