
TABLE OF CONTENTS (Continued)
Paragraph
Page
Number
Title
Number
x
USERS MANUAL
MOTOROLA
11.4.1.11
Interrupt Mask Register (UIMR)................................... 11-30
11.4.1.12
Timer Upper Preload Register 1 (UBG1)..................... 11-31
11.4.1.13
Timer Upper Preload Register 2 (UBG2)..................... 11-31
11.4.1.14
Interrupt Vector Register (UIVR) ................................. 11-31
11.4.1.14.1
Input Port Register (UIP)......................................................... 11-32
11.4.1.14.2
Output Port Data Registers (UOP1, UOP0) ............................ 11-32
11.4.2
Programming........................................................................... 11-33
11.4.2.1
UART Module Initializatin ............................................ 11-33
11.4.2.2
I/O Driver Example ...................................................... 11-33
11.4.2.3
Interrupt Handling ........................................................ 11-33
11.5
UART Module Initialization Sequence............................................... 11-34
Section 12
M-Bus Module
12.1
Overview ............................................................................................ 12-1
12.2
Interface Features .............................................................................. 12-1
12.3
M-Bus System Configuration ............................................................. 12-2
12.4
M-Bus Protocol ................................................................................... 12-3
12.4.1
START Signal .......................................................................... 12-3
12.4.2
Slave Address Transmission .................................................... 12-3
12.4.3
Data Transfer ........................................................................... 12-4
12.4.4
Repeated START Signal .......................................................... 12-4
12.4.5
STOP Signal ............................................................................ 12-4
12.4.6
Arbitration Procedure ............................................................... 12-4
12.4.7
Clock Synchronization .............................................................. 12-5
12.4.8
Handshaking ............................................................................ 12-5
12.4.9
Clock Stretching ....................................................................... 12-5
12.5
Programming Model ........................................................................... 12-6
12.5.1
M-Bus Address Register (MADR). ........................................... 12-6
12.5.2
M-Bus Frequency Divider Register (MFDR) ............................ 12-6
12.5.3
M-Bus Control Register (MBCR) .............................................. 12-8
12.5.4
M-Bus Status Register (MBSR) ............................................... 12-9
12.5.5
M-Bus Data I/O Register (MBDR) .......................................... 12-11
12.6
M-Bus Programming Examples ....................................................... 12-11
12.6.1
Initialization Sequence ........................................................... 12-11
12.6.2
Generation of START ............................................................. 12-11
12.6.3
Post-Transfer Software Response ......................................... 12-12
12.6.4
Generation of STOP ............................................................... 12-14
12.6.5
Generation of Repeated START ............................................ 12-14
12.6.6
Slave Mode ............................................................................ 12-15
12.6.7
Arbitration Lost ....................................................................... 12-15
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Freescale Semiconductor, Inc.
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