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MOTOROLA
MCF5206 USERS MANUAL Rev 1.0
xv
LIST OF ILLUSTRATIONS
Figure
Page
Number
Title
Number
1-1.
MCF5206 Block Diagram ................................................................................. 1-4
1-2.
Programming Model......................................................................................... 1-7
3-1.
ColdFire Processor Core Pipelines .................................................................. 3-1
3-2.
User Programming Model ................................................................................3-3
3-3.
Supervisor Programming Mode ....................................................................... 3-4
3-4.
Status Register................................................................................................. 3-4
3-5.
Exception Stack Frame Form........................................................................... 3-7
4-1.
Instruction Cache Block Diagram......................................................................4-2
6-1.
Signal Relationships to CLK............................................................................. 6-6
6-2.
Internal Operand Representation..................................................................... 6-7
6-3.
MCF5206 Interface to Various Port Sizes........................................................ 6-8
6-4.
Byte-, Word-, and Longword-Read Transfer Flowchart ................................. 6-10
6-5.
Longword-Read Transfer From a 32-Bit Port (No Wait States) ..................... 6-11
6-6.
Byte-, Word-, and Longword-Write Transfer Flowchart ..................................6-13
6-7.
Word-Write Transfer to a 16-Bit Port (No Wait States) .................................. 6-14
6-8.
Bursting Word-, Longword-, and Line-Read Transfer Flowchart.................... 6-16
6-9.
Bursting Word-Read From an 8-Bit Port (No Wait States)............................. 6-17
6-10.
Word-, Longword-, and Line-Write Transfer Flowchart ...................................6-19
6-11.
Line-Write Transfer to a 32-Bit Port (No Wait States) ....................................6-20
6-12.
Burst-Inhibited Word-, Longword-, and Line-Read Transfer Flowchart.......... 6-22
6-13.
Burst-Inhibited Longword Read From an 8-Bit Port (No Wait States) ............6-23
6-14.
Burst-Inhibited Byte-, Word-, and Longword-Write Transfer Flowchart .........6-25
6-15.
Burst-Inhibited Longword-Write Transfer to a 16-Bit Port
(No Wait States) .............................................................................................6-26
6-16.
Byte-, Word-, and Longword-Read Transfer with Asynchronous Termination Flow-
chart (One Wait State) ...................................................................................6-28
6-17.
Byte-Read Transfer from an 8-Bit Port Using Asynchronous Termination (One Wait
State) .............................................................................................................6-29
6-18.
Byte-, Word-, and Longword-Write Transfer with Asynchronous Termination Flow-
chart ...............................................................................................................6-30
6-19.
Byte-Write Transfer to a 32-Bit Port Using Asynchronous Termination (One Wait
State) .............................................................................................................6-31
Date: 8-31-98
Revision No.: 1.1
Pages affected: See change bars
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