Chapter 16 Timer/PWM Module (S08TPMV3)
MC9S08SG32 Data Sheet, Rev. 7
252
Freescale Semiconductor
16.3.5
TPM Channel Value Registers (TPMxCnVH:TPMxCnVL)
These read/write registers contain the captured TPM counter value of the input capture function or the
output compare value for the output compare or PWM functions. The channel registers are cleared by
reset.
4
MSnA
Mode select A for TPM channel n. When CPWMS=0 and MSnB=0, MSnA congures TPM channel n for
input-capture mode or output compare mode. Refer to
Table 16-7 for a summary of channel mode and setup
controls.
Note: If the associated port pin is not stable for at least two bus clock cycles before changing to input capture
mode, it is possible to get an unexpected indication of an edge trigger.
3–2
ELSnB
ELSnA
Edge/level select bits. Depending upon the operating mode for the timer channel as set by CPWMS:MSnB:MSnA
and shown in
Table 16-7, these bits select the polarity of the input edge that triggers an input capture event, select
the level that will be driven in response to an output compare match, or select the polarity of the PWM output.
Setting ELSnB:ELSnA to 0:0 congures the related timer pin as a general purpose I/O pin not related to any timer
functions. This function is typically used to temporarily disable an input capture channel or to make the timer pin
available as a general purpose I/O pin when the associated timer channel is set up as a software timer that does
not require the use of a pin.
Table 16-7. Mode, Edge, and Level Selection
CPWMS
MSnB:MSnA
ELSnB:ELSnA
Mode
Conguration
X
XX
00
Pin not used for TPM - revert to general
purpose I/O or other peripheral control
0
00
01
Input capture
Capture on rising edge
only
10
Capture on falling edge
only
11
Capture on rising or
falling edge
01
00
Output compare
Software compare only
01
Toggle output on
compare
10
Clear output on
compare
11
Set output on compare
1X
10
Edge-aligned
PWM
High-true pulses (clear
output on compare)
X1
Low-true pulses (set
output on compare)
1
XX
10
Center-aligned
PWM
High-true pulses (clear
output on compare-up)
X1
Low-true pulses (set
output on compare-up)
Table 16-6. TPMxCnSC Field Descriptions (continued)
Field
Description