參數(shù)資料
型號: MC9328MXLDVP15
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 150 MHz, RISC PROCESSOR, PBGA225
封裝: 13 X 13 MM, 0.80 MM PITCH, MAPBGA-225
文件頁數(shù): 78/89頁
文件大小: 1869K
代理商: MC9328MXLDVP15
8
MC9328MXL Advance Information
MOTOROLA
Signals and Connections
SPI2_TXD
SPI2 Master TxData Output—This signal is multiplexed with a GPI/O pin yet shows up as
a primary or alternative signal in the signal multiplex scheme table. Please refer to the
SPI and GPIO chapters in the MC9328MXL Reference Manual for information about how
to bring this signal to the assigned pin.
SPI2_RXD
SPI2 Master RxData Input—This signal is multiplexed with a GPI/O pin yet shows up as a
primary or alternative signal in the signal multiplex scheme table. Please refer to the SPI
and GPIO chapters in the MC9328MXL Reference Manual for information about how to
bring this signal to the assigned pin.
SPI2_SS
SPI2 Slave Select—This signal is multiplexed with a GPI/O pin yet shows up as a primary
or alternative signal in the signal multiplex scheme table. Please refer to the SPI and
GPIO chapters in the MC9328MXL Reference Manual for information about how to bring
this signal to the assigned pin.
SPI2_SCLK
SPI2 Serial Clock—This signal is multiplexed with a GPI/O pin yet shows up as a primary
or alternative signal in the signal multiplex scheme table. Please refer to the SPI and
GPIO chapters in the MC9328MXL Reference Manual for information about how to bring
this signal to the assigned pin.
General Purpose Timers
TIN
Timer Input Capture or Timer Input Clock—The signal on this input is applied to both
timers simultaneously.
TMR2OUT
Timer 2 Output
USB Device
USBD_VMO
USB Minus Output
USBD_VPO
USB Plus Output
USBD_VM
USB Minus Input
USBD_VP
USB Plus Input
USBD_SUSPND
USB Suspend Output
USBD_RCV
USB Receive Data
USBD_OE
USB OE
USBD_AFE
USB Analog Front End Enable
Secure Digital Interface
SD_CMD
SD Command—If the system designer does not wish to make use of the internal pull-up,
via the Pull-up enable register, a 4.7K–69K external pull up resistor must be added.
SD_CLK
MMC Output Clock
SD_DAT [3:0]
Data—If the system designer does not wish to make use of the internal pull-up, via the
Pull-up enable register, a 50K–69K external pull up resistor must be added.
Memory Stick Interface
MS_BS
Memory Stick Bus State (Output)—Serial bus control signal
MS_SDIO
Memory Stick Serial Data (Input/Output)
MS_SCLKO
Memory Stick Serial Clock (Input)—Serial protocol clock source for SCLK Divider
Table 2. MC9328MXL Signal Descriptions (Continued)
Signal Name
Function/Notes
相關(guān)PDF資料
PDF描述
MC9328MXLDVF15 150 MHz, RISC PROCESSOR, PBGA225
MC9328MXLVF15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225
MC9328MXLVH20 32-BIT, 200 MHz, RISC PROCESSOR, PBGA256
MC9328MXLDVM20 200 MHz, RISC PROCESSOR, PBGA256
MC9328MXLVM20 200 MHz, RISC PROCESSOR, PBGA256
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