參數(shù)資料
型號(hào)： MC9328MXLDVP15
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 150 MHz, RISC PROCESSOR, PBGA225
封裝： 13 X 13 MM, 0.80 MM PITCH, MAPBGA-225
文件頁(yè)數(shù)： 48/89頁(yè)
文件大?。?/td> 1869K
代理商： MC9328MXLDVP15
52
MC9328MXL Advance Information
MOTOROLA
Specifications
Figure 41. Timing Diagrams at Data Read
Figure 42 shows the basic write operation timing. As with the read operation, after the card response, the
data transfer starts after NWR cycles. The data is suffixed with CRC check bits to allow the card to check
for transmission errors. The card sends back the CRC check result as a CC status token on the data line. If
there was a transmission error, the card sends a negative CRC status (101); otherwise, a positive CRC
status (010) is returned. The card expects a continuous flow of data blocks if it is configured to multiple
block mode, with the flow terminated by a stop transmission command.
NAC cycles
Read Data
Timing of single block read
NAC cycles
Read Data
Timing of multiple block read
NAC cycles
NST
Timing of stop command
(CMD12, data transfer mode)
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
DAT
Z****Z
Z Z P
P S D
*****
D D D
DAT
Z****Z
Z Z P
P S D
*****
******
D D D
P
*****
P S D D D D
******
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
*****
Read Data
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
Valid Read Data
DAT
*****
Z
E
*****
D D D D
Z
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