參數(shù)資料
型號: MC92600JUB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217
封裝: 23 X 23 MM, 2.32 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-217
文件頁數(shù): 61/98頁
文件大?。?/td> 1288K
代理商: MC92600JUB
6-10
MC92600 SERDES User’s Manual
MOTOROLA
AC Electrical Characteristics
6.3.4
Serial Data Link Timing
This following sections cover the input and output data link timing.
6.3.4.1
Link Differential Output
The transmitter timing diagram for the link differential output is shown in Figure 6-9.
Figure 6-9. Link Differential Output Timing Diagram
Table 6-13 shows the timing specications for the link differential output.
Table 6-12. Recovered Clock Specication
Symbol
Characteristic
Min
Max
Unit
Trck
RECV_x_RCLK normal cycle period 1
1 Measured between 50-50% points, 125 MHz REF_CLK, full speed (HSE = Low), normal data rate
(DDRE = Low).
8.0
-
ns
Tsrck
RECV_x_RCLK short cycle period1
6.4
-
ns
Tlrck
RECV_x_RCLK long cycle period1
9.6
-
ns
Tr
RECV_x_RCLK rise time 2
2 Measured between 10-90% points.
-
1.8
ns
Tf
RECV_x_RCLK fall time2
-
1.8
ns
Table 6-13. Link Differential Output Specication
Symbol
Characteristic
Min
Max
Unit
Tf
Link output fall time 1
1 Measured between 10-90% points.
-
200
ps
Tr
Link output rise time 1
-
200
ps
Tj
Total jitter 2
2 Measured between 50-50% points, 125 MHz REF_CLK, 1.25 gigabaud rate.
-
0.24
UI
Tdj
Deterministic jitter 2
-
0.12
UI
Tds
Differential skew 2
-25
ps
Xlat
Transmit latency 3
3 REF_CLK to rst bit transmit.
-
25
bit-times
XLINK_x_P
Tf, Tr
XLINK_x_N
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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