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參數(shù)資料
| 型號： | MC92600JUB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217 |
| 封裝： | 23 X 23 MM, 2.32 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-217 |
| 文件頁數(shù)： | 48/98頁 |
| 文件大小： | 1288K |
| 代理商： | MC92600JUB |
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5-2
MC92600 SERDES User’s Manual
MOTOROLA
BIST Sequence System Test Mode
5.2
BIST Sequence System Test Mode
The MC92600 transmitter has an integrated, 23rd order, pseudo-noise (PN) pattern
generator. Stimulus from this generator may be used for internal built-in self testing (BIST).
The receiver has a 23rd order signature analyzer that is synchronized to the incoming PN
stream and may be used to count character mismatch errors relative to the internal PN
reference pattern.
To properly use the BIST sequence system test mode, the system must provide the proper
stimulus in a special sequence. The sequence of steps to run a BIST test is as follows:
1. Select the reference clock frequency at which you wish to run the BIST test. See
Table 4-1 , "Legal Reference Clock Frequency Ranges” for pin settings for HSE and
DDRE modes.
2. Enter test mode by setting the test mode inputs as described in Table 5-1.
3. Transmit two 4/1 word synchronization event sequences.
4. Transmit to the receiver an 8B/10B encoded PN sequence as described above.
The transmitter will automatically go through steps 3 and 4 upon entering this test mode.
Upon completion of testing, the transceiver will need to be re-synchronized before normal
operation can resume.
This implementation of the 23-bit PN generator and analyzer uses the polynomial:
f = 1 + x5 + x23
The total mismatch error count is reset to zero when BIST mode is entered. The count is
updated continuously while in BIST mode. The value of the count is presented on the
receiver interface signals: RECV_x_7 through RECV_x_0, making up the eight-bit error
count, ordered bits 7 through 0, respectively. The value of the count is sticky in that the
count will not wrap to zero upon overow, but rather stays at the maximum count value
(11111111).
The RECV_x_ERR, RECV_x_K and RECV_x_IDLE have special meaning during this test
mode. They report the status of the receiver and PN analysis logic. Table 5-2 , "BIST Error
Codes” describes the BIST error codes and their meaning.
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For More Information On This Product,
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