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參數(shù)資料
| 型號： | MC7455ARX1000LG |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA483 |
| 封裝： | 29 X 29 MM, 1.27 MM PITCH, CERAMIC, BGA-483 |
| 文件頁數(shù)： | 6/76頁 |
| 文件大?。?/td> | 1520K |
| 代理商： | MC7455ARX1000LG |
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14
MPC7455 RISC Microprocessor Hardware Specifications
MOTOROLA
Electrical and Thermal Characteristics
Table 7 provides the power consumption for the MPC7455.
Input leakage current,
Vin = GVDD/OVDD + 0.3 V
—Iin
—30
A
2, 3
High impedance (off-state) leakage
current, Vin = GVDD/OVDD + 0.3 V
—ITSI
—30
A
2, 3, 5
Output high voltage, IOH = –5 mA
1.5
VOH
GVDD – 0.45
—
V
6
1.8
VOH
OVDD/GVDD – 0.45
—
V
2.5
VOH
1.7
—
V
Output low voltage, IOL = 5 mA
1.5
VOL
—0.45
V
6
1.8
VOL
—0.45
V
2.5
VOL
—0.7
V
Capacitance,
Vin = 0 V,
f = 1 MHz
L3 interface
—
Cin
—9.5
pF
4
All other inputs
—
8.0
pF
4
Notes:
1. Nominal voltages; see Table 4 for recommended operating conditions.
2. For processor bus signals, the reference is OVDD while GVDD is the reference for the L3 bus signals.
3. Excludes test signals and IEEE 1149.1 boundary scan (JTAG) signals.
4. Capacitance is periodically sampled rather than 100% tested.
5. The leakage is measured for nominal OVDD/GVDD and VDD, or both OVDD/GVDD and VDD must vary in the same
direction (for example, both OVDD and VDD vary by either +5% or –5%).
6. Applicable to L3 bus interface only.
Table 7. Power Consumption for MPC7455
Processor (CPU) Frequency
Unit
Notes
733 MHz
867 MHz
933 MHz
1 GHz
Full-Power Mode
Typical
11.5
12.9
13.6
15.0
W
1, 3
Maximum
17.0
19.0
20.0
22.0
W
1, 2
Doze Mode
Typical
————
W
4
Nap Mode
Typical
8.0
W
1, 3
Sleep Mode
Typical
7.6
W
1, 3
Table 6. DC Electrical Specifications (continued)
At recommended operating conditions. See Table 4.
Characteristic
Nominal
Bus
Voltage 1
Symbol
Min
Max
Unit
Notes
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