參數(shù)資料
型號: MC68HRC705KJ1CP
廠商: Freescale Semiconductor
文件頁數(shù): 103/108頁
文件大小: 0K
描述: IC MCU 1.2K 4MHZ OTP 16-DIP
標準包裝: 25
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 10
程序存儲器容量: 1.2KB(1.2K x 8)
程序存儲器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-DIP(0.300",7.62mm)
包裝: 管件
Electrical Specifications
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
94
Freescale Semiconductor
Figure 10-8. Stop Mode Recovery Timing
Figure 10-9. Power-On Reset Timing
tILIH
OSCILLATOR STABILIZATION DELAY(5)
OSC (NOTE 1)
tRL
RESET
IRQ (NOTE 2)
IRQ (NOTE 3)
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
Notes:
1. Internal clocking from OSC1 pin
2. Edge-triggered external interrupt mask option
3. Edge- and level-triggered external interrupt mask option
4. Reset vector shown as example
RESET OR INTERRUPT
VECTOR FETCH
07FE
07FF
(NOTE 4)
5. 4064 tcyc or 128 tcyc, depending on the state of SOSCD bit in MOR
07FE
OSCILLATOR STABILIZATION DELAY(3)
VDD
OSC1 PIN
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
NOTES:
INTERNAL
DATA BUS
07FE
07FF
(NOTE 1)
1. Power-on reset threshold is typically between 1 V and 2 V.
2. Internal clock, internal address bus, and internal data bus are not available externally.
NEW
PCH
NEW
PCL
3. 4064 tcyc or 128 tcyc depending on the state of SOSCD bit in MOR
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