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參數(shù)資料
| 型號(hào)： | MC68HLC705KJ1CDWR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁(yè)數(shù)： | 21/144頁(yè) |
| 文件大?。?/td> | 1377K |
| 代理商： | MC68HLC705KJ1CDWR2 |
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Electrical Specifications
5.0-V DC Electrical Characteristics
MC68HC705KJ1 — Rev. 2.0
Technical Data
MOTOROLA
Electrical Specifications
117
11.6 5.0-V DC Electrical Characteristics
Characteristic(1)
1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40°C to +85°C, unless otherwise noted.
Symbol
Min
Typ(2)
2. Typical values at midpoint of voltage range, 25
°C only
Max
Unit
Output High Voltage
(ILoad = –2.5 mA) PA4–PA7
(ILoad = –5.5 mA) PB2–PB3, PA0–PA3
VOH
VDD –0.8
—
V
Output Low Voltage(8)
(ILoad = 10.0 mA) PA0–PA7, PB2–PB3
VOL
—
0.8
V
Input High Voltage
PA0–PA7, PB2–PB3, IRQ/VPP, RESET, OSC1
VIH
0.7
× V
DD
—
VDD
V
Input Low Voltage
PA0–PA7, PB2–PB3, IRQ/VPP, RESET, OSC1
VIL
VSS
—
0.2
× V
DD
V
Supply Current (fOP = 2.1 MHz; fOSC = 4.2 MHz)
Run Mode(3)
Wait Mode(4)
Stop Mode(5)
3. Run mode IDD is measured using external square wave clock source; all inputs 0.2 V from rail; no dc loads; less than 50 pF
on all outputs; CL = 20 pF on OSC2.
4. Wait mode IDD: only timer system active. Wait mode is affected linearly by OSC2 capacitance. Wait mode is measured
with all ports configured as inputs; VIL = 0.2 V; VIH =VDD – 0.2 V. Wait mode IDD is measured using external square wave
clock source; all inputs 0.2 V from rail; no dc loads; less than 50 pF on all outputs; CL = 20 pF on OSC2.
5. Stop mode IDD is measured with OSC1 = VSS. Stop mode IDD is measured with all ports configured as inputs; VIL = 0.2 V;
VIH = VDD – 0.2 V.
IDD
—
4.0
1.0
0.1
6.0
2.8
5.0
mA
A
Supply Current (fOP = 4.0 MHz; fOSC = 8.0 MHz)
Run Mode(3)
Wait Mode(4)
Stop Mode(5)
IDD
—
5.2
1.1
0.1
7.0
3.3
5.0
mA
A
I/O Ports Hi-Z Leakage Current
PA0–PA7, PB2–PB3 (Without Individual Pulldown Activated)
IIL
—
0.2
±1
A
Input Pulldown Current
PA0–PA7, PB2–PB3 (With Individual Pulldown Activated)
IIL
35
80
200
A
Input Pullup Current
RESET
IIL
–15
–35
–85
A
Input Current(6)
RESET, IRQ/VPP, OSC1
6. Only input high current rated to +1
A on RESET.
IIn
—
0.2
±1
A
Capacitance
Ports (As Inputs or Outputs)
RESET, IRQ, OSC1, OSC2
COut
CIn
—
12
8
pF
Crystal/Ceramic Resonator Oscillator Mode
Internal Resistor
OSC1 to OSC2(7)
7. The ROSC value selected for RC oscillator versions of this device is unspecified.
8. Maximum current drain for all I/O pins combined should not exceed 100 mA.
ROSC
1.0
2.0
3.0
M
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