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參數(shù)資料
| 型號： | MC68HC901FNR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 35/73頁 |
| 文件大小： | 274K |
| 代理商： | MC68HC901FNR2 |
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Timers
MOTOROLA
MC68HC901 USER’S MANUAL
6-3
The state of the active edge bit also specifies whether a zero-to-one transition or a one-to-
zero transition of the auxiliary input pin will produce an interrupt when the interrupt channel
is enabled. In normal operation, programming the active edge bit to a one will produce an
interrupt on the zero-to-one transition of the associated input signal. Alternately,
programming the edge bit to a zero will produce an interrupt on the one-to-zero transition of
the input signal. However, in the pulse width measurement mode, the interrupt generated
by a transition on TAI or TBI will occur on the opposite transition as that normally defined by
the edge bit.
For example, in the pulse width measurement mode, if the edge bit is a one, the timer will
be allowed to run while the auxiliary input is high. When the input transitions from high to
low, the timer will stop and, if the interrupt channel is enabled, an interrupt will occur. By
having the interrupt occur on the one-to-zero transition instead of the zero-to-one transition,
the processor will be interrupted when the pulse being measured has been terminated and
the width of the pulse from the timer is available.
After reading the contents of the timer, the processor must re-initialize the main counter by
writing to the timer data register to allow consecutive pulses to be measured. If the data
register is written after the auxiliary input signal becomes active, the timer will count from the
previous contents of the timer data register until it counts through 01 (hexadecimal). At that
time, the main counter is loaded with the new value from the timer data register, a time out
pulse is generated which will toggle the timer output, and an interrupt may be optionally
generated on the timer interrupt channel. Note that the pulse width measured includes
counts from before the main counter was reloaded. If the timer data register is written while
the pulse is transitioning to the active state, an indeterminate value may be written into the
main counter.
Once the timer is reprogrammed for another mode, interrupts will again occur as normally
defined by the edge bit. Note that an interrupt may be generated as the result of placing the
timer into the pulse width measurement mode or by reprogramming the timer for another
mode. Also, an interrupt may be generated by changing the state of the edge bit while in the
pulse width measurement mode.
6.1.3 Event Count Mode Operation
In addition to the delay mode and the pulse width measurement mode, timers A and B may
be programmed to operate in the event count mode. Like the pulse width measurement
mode, the event count mode requires an auxiliary input signal, TAI or TBI. General purpose
lines I3 and I4 can be used for I/O or as interrupt producing inputs.
In the event count mode, the prescaler is disabled allowing each active transition on TAI and
TBI to produce a count pulse. The count pulse causes the main counter to decrement by
one. When the timer counts through 01 (hexadecimal), a time out pulse is generated which
will cause the output signal to toggle and may optionally produce an interrupt via the
associated timer interrupt channel. The timer's main counter is also reloaded from the timer
data register. To count transitions reliably, the input signal may only transition once every
four timer clock periods. For this reason, the input signal must have a maximum frequency
of one-fourth that of the timer clock.
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