參數(shù)資料
型號(hào): MC68HC901FNR2
廠商: MOTOROLA INC
元件分類: 外設(shè)及接口
英文描述: MULTIFUNCTION PERIPHERAL, PQCC52
封裝: PLASTIC, LCC-52
文件頁(yè)數(shù): 18/73頁(yè)
文件大?。?/td> 274K
代理商: MC68HC901FNR2
Interrupt Structure
4-2
MC68HC901 USER’S MANUAL
MOTOROLA
IV3-IV0 — Interrupt Vector
These bits are supplied by the MFP. They are the binary channel number of the highest
priority channel that is requesting interrupt service.
4.1.3 Vector Register (VR)
This 8-bit register determines the four most-significant bits in the interrupt vector format and
which end-of-interrupt mode is used in a vectored interrupt scheme. The vector register
should be written to before writing to the interrupt mask or enable registers to ensure that
the MFP responds to an interrupt acknowledge cycle with a vector number not in the range
of allowable user vectors. For information refer to Section 4.4.1 Selecting the End-Of-
Interrupt Mode.
IV3
IV2
IV1
IV0
DESCRIPTION
1
General Purpose Interrupt 7 (I7)
1
0
General Purpose Interrupt 6 (I6)
1
0
1
Timer A
1
0
Receiver Buffer Full
1
0
1
Receive Error
1
0
1
0
Transmit Buffer Empty
1
0
1
Transmit Error
1
0
Timer B
0
1
General Purpose Interrupt 5 (I5)
0
1
0
General Purpose Interrupt 4(I4)
0
1
0
1
Timer C
0
1
0
Timer D
0
1
General Purpose Interrupt 3 (I3)
0
1
0
General Purpose Interrupt 2 (I2)
0
1
General Purpose Interrupt 1 (I1)
0
General Purpose Interrupt 0 (I0)
VR REGISTER
BIT
7
6
5
4
3
2
1
0
FIELD
V7
V6
V5
V4
S
*
RESET
0
ADDR
$17
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