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參數(shù)資料
| 型號： | MC68HC805K3DW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, EEPROM, 2 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 78/119頁 |
| 文件大?。?/td> | 2870K |
| 代理商： | MC68HC805K3DW |
General Release Specification
Port A
MC68HC805K3 — Rev. 1.0
Parallel Input/Output
61
The port A DATA register is located at address $0000. The port A data
direction register (DDRA) is located at address $0004. The port A
pulldown register (PDRA) is located at address $0010. Reset clears both
the DDRA and the PDRA. The port A data register is unaffected by reset.
7.3.1 Port A Data Register
Each port A I/O pin has a corresponding bit in the port A data register.
When a port A pin is programmed as an output, the state of the
corresponding data register bit determines the state of the output pin.
When a port A pin is programmed as an input, any read of the port A data
register returns the logic state of the corresponding I/O pin, and any write
to the port A data register is saved in the data register, but is not applied
to the corresponding I/O pin. The port A data register is unaffected by
reset. The port A data register is indeterminant after initial power-up.
7.3.2 Port A Data Direction Register
Each port A I/O pin may be programmed as an input by clearing the
corresponding bit in the DDRA or programmed as an output by setting
the corresponding bit in the DDRA. When a DDRA bit is set, the
corresponding pulldown device is disabled. The DDRA can be accessed
at address $0004. The DDRA is cleared by reset.
7.3.3 Port A Pulldown Inhibit Register
All port A I/O pins have software programmable pulldown devices which
may be enabled by a mask option register bit. If enabled by mask option
register bit, the software programmable pulldowns are activated by
clearing their corresponding bit in the PDRA or disabled by setting the
corresponding bit in the PDRA. If disabled by a mask option register bit,
all pulldowns are disabled. A pulldown on an I/O pin can be activated
only if the I/O pin is programmed as an input. Any activated pulldowns
on the port A pins are not affected by the VDD supply source to the
drivers.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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