參數(shù)資料
型號： MC68HC711D3CP3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 126/138頁
文件大?。?/td> 1047K
代理商： MC68HC711D3CP3
Programmable Timer
MC68HC711D3 Data Sheet, Rev. 2.1
88
Freescale Semiconductor
Figure 8-2. Capture/Compare Block Diagram
The control and status bits that implement the input capture functions are contained in the PACTL,
TCTL2, TMSK1, and TFLG1 registers.
To configure port A bit 3 as an input capture, clear the DDRA3 bit of the PACTL register. Note that this bit
is cleared out of reset. To enable PA3 as the fourth input capture, set the I4/O5 bit in the PACTL register.
Otherwise, PA3 is configured as a fifth output compare out of reset, with bit I4/O5 being cleared. If the
DDRA3 bit is set (configuring PA3 as an output), and IC4 is enabled, then writes to PA3 cause edges on
the pin to result in input captures. Writing to TI4/O5 has no effect when the TI4/O5 register is acting as IC4.
MCU E
16-BIT LATCH
CLK
4
5
6
7
8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
OC1I
OC2I
OC3I
OC4I
I4/O5I
TFLG 1
STATUS
FLAGS
FOC1
FOC2
FOC3
FOC4
FOC5
OC1F
OC2F
OC3F
OC4F
I4/O5F
PA3/IC4/
PA4/OC4/
PA5/OC3/
PA6/OC2/
PA7/OC1/
I4/O5
16-BIT COMPARATOR =
TOC1 (HI)
TOC1 (LO)
16-BIT COMPARATOR =
TOC2 (HI)
TOC2 (LO)
16-BIT COMPARATOR =
TOC3 (HI)
TOC3 (LO)
16-BIT COMPARATOR =
TOC4 (HI)
TOC4 (LO)
16-BIT COMPARATOR =
TI4/O5 (HI)
TI4/O5
(LO)
16-BIT FREE RUNNING
COUNTER
TCNT (HI)
TCNT (LO)
9
TOI
TOF
PRESCALER — DIVIDE BY
1, 4, 8, 16
PR1
16-BIT TIMER BUS
OC5
IC4
TMSK 1
INTERRUPT
ENABLES
CFORC
PORT A
PINS
PA0/IC3
3
2
1
BIT 2
BIT 1
BIT 0
IC1I
IC2I
IC3I
IC1F
IC2F
IC3F
PA1/IC2
PA2/IC1
16-BIT LATCH
TIC1
(HI)
TIC1
(LO)
CLK
16-BIT LATCH
TIC2
(HI)
TIC2
(LO)
CLK
16-BIT LATCH
TIC3
(HI)
TIC3
(LO)
CLK
PR0
CLOCK
PAI
OC1
OC5/OC1
PORT A
PIN
CONTROL
TO PULSE
ACCUMULATOR
INTERRUPT REQUESTS
(FURTHER QUALIFIED
BY I BIT IN CCR)
FORCE
OUTPUT
COMPARE
TAPS FOR RTL,
COP WATCHDOG,
AND PULSE ACCUMULATOR
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