參數(shù)資料
型號： MC68HC705L16CFU
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 74/146頁
文件大?。?/td> 852K
代理商： MC68HC705L16CFU
Option Map for I/O Configurations
MC68HC05L16 MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
33
CWOMx — Port C Open-Drain Mode (Bitx)
When CWOMx bit is set, port C bits x are configured as open-drain outputs if DDRCx is set. This bit is
cleared on reset.
2.4.5 Key Wakeup Input Enable Register
KWIEx — Key Wakeup Input Enable (Bitx)
When KWIEx bit is set, the KWIx (PBx) input is enabled for key wakeup interrupt. This bit is cleared on
reset.
2.4.6 Mask Option Status Register
The mask option status register (MOSR) indicates the state of mask options specified prior to production
of the MC68HC05L16.
RSTR — RESET Pin Pullup Resistor
When this bit is set, it indicates an internal pullup resistor is attached to the RESET pin by mask option.
OSCR — OSC Feedback Resistor
When this bit is set, it indicates that an internal feedback resistor is attached between OSC1 and OSC2
by mask option.
XOSCR — OSC Feedback Resistor
When this bit is set, it indicates that an internal feedback resistor is attached between XOSC1 and
XOSC2. The damping resistor at the XOSC2 pin is attached by mask option.
Bits 4–0 — Reserved
These bits are not used and always read as logic 0.
Address:
Option Map — $000E
Bit 7
654321
Bit 0
Read:
KWIE7
KWIE6
KWIE5
KWIE4
KWIE3
KWIE2
KWIE1
KWIE0
Write:
Reset:
00000000
Figure 2-9. Key Wakeup Input Enable Register (KWIEN)
Address:
Option Map — $000F
Bit 7
654321
Bit 0
Read:
RSTR
OSCR
XOSCR
00000
Write:
Reset:
U
00000
= Unimplemented
U = Unaffected
Figure 2-10. Mask Option Status Register (MOSR)
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