參數(shù)資料
型號： MC68HC705E6
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： HCMOS Microcontroller Unit
中文描述： HCMOS微控制器
文件頁數(shù)： 50/140頁
文件大小： 788K
代理商： MC68HC705E6
Core Timer
MC68HC05E6 — Rev. 1.0
Core Timer
Core timer counter
register (CTCR)
The core timer counter register is a read-only register, which contains
the current value of the 8-bit ripple counter at the beginning of the timer
chain. Reset clears this register.
Core timer during WAIT
The CPU clock halts during the WAIT mode, but the core timer remains
active. If the CTIMER interrupts are enabled, then a CTIMER interrupt
will cause the processor to exit the WAIT mode.
Core timer during STOP
The timer is cleared when going into STOP mode. When STOP is exited
by an external interrupt or an external reset, the internal oscillator will
restart, followed by an internal processor stabilization delay (t
PORL
). The
timer is then cleared and operation resumes.
Table 8 Example RTI periods
Bus frequency
f
OP
= 500 kHz
Bus frequency
f
OP
= 1 MHz
Bus frequency
f
OP
= 2 MHz
RT1
RT0
Division
ratio
RTI
period
Minimum
COP
period
229.38ms
458.75ms
917.5ms
1.835s
RTI
period
Minimum
COP
period
114.69ms
229.38ms
458.75ms
917.50ms
RTI
period
Minimum
COP
period
57.34ms
114.69ms
229.38ms
458.75ms
0
0
1
1
0
1
0
1
2
14
2
15
2
16
2
17
32.8ms
65.5ms
131.1ms
262.1ms
16.4ms
32.8ms
65.5ms
131.1ms
8.2ms
16.4ms
32.8ms
65.5ms
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
0000 0000
Core timer counter (CTCR)
$0009
6-ctimer
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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