參數(shù)資料
型號： MC68HC705E6
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： HCMOS Microcontroller Unit
中文描述： HCMOS微控制器
文件頁數(shù)： 36/140頁
文件大小： 788K
代理商： MC68HC705E6
Input/Output Ports
MC68HC05E6 — Rev. 1.0
Input/Output Ports
Input/output programming
The bidirectional port lines may be programmed as inputs or outputs
under software control. The direction of each pin is determined by the
state of the corresponding bit in the port data direction register (DDR).
Each I/O port has an associated DDR. Any I/O port pin is configured as
an output if its corresponding DDR bit is set. A pin is configured as an
input if its corresponding DDR bit is cleared.
At power-on or reset, all DDRs are cleared, thus configuring all port pins
as inputs. The data direction registers can be written to or read by the
MCU. During the programmed output state, a read of the data register
actually reads the value of the output data buffer and not the I/O pin. The
operation of the standard port hardware is shown schematically in
Figure 8
.
This is further summarized in
Table 4
, which shows the effect of reading
from, or writing to an I/O pin in various circumstances. Note that the
read/write signal shown is internal and not available to the user.
Figure 8 Standard I/O port structure
Table 4 I/O pin states
R/W
0
0
1
1
DDRn
0
1
0
1
Action of MCU write to/read of data bit
The I/O pin is in input mode. Data is written into the output data latch.
Data is written into the output data latch, and output to the I/O pin.
The state of the I/O pin is read.
The I/O pin is in output mode. The output data latch is read.
Latched data
register bit
DDRn
DATA
Input
buffer
Output
buffer
O/P
data
buffer
M
DDRn
1
1
0
0
DATA
0
1
0
1
I/O Pin
0
1
tristate
tristate
I/O
pin
Input
Data direction
register bit
Output
2-ports
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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