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| 型號： | MC68HC705CJ4FB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 47/114頁 |
| 文件大小： | 4047K |
| 代理商： | MC68HC705CJ4FB |
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GENERAL RELEASE SPECIFICATION
SERIAL COMMUNICATIONS INTERFACE
Rev. 2.1
8-1
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SECTION 8
SERIAL COMMUNICATIONS INTERFACE
8.1 Introduction
This is an NRZ asynchronous communication system with internal baud rate
generation circuitry. It can be configured for eight or nine data bits. The baud rate
generator is programmable to allow flexibility in choosing baud rates. There is a
receiver wake-up feature, an idle line detect feature and various error detection
features. Two port D pins provide the external interface for the transmitted data
(TXD) and the received data (RXD).
8.2 Transmit Operation
This transmitter includes a transmit serial shift register and a parallel transmit data
register (forming a double buffered system). The transmit serial shift register is
internal to the transmit logic and may not be read or written directly by the CPU.
The output of this serial shifter is connected to the TXD pin (port D bit 1) as long as
the transmitter is enabled (TE control bit set or TE clear but a transmit operation
being completed). If the transmitter is enabled (TE = 1), TC will be set at the end
of a frame provided the transmit data register is empty (TDRE = 1), there is no
pending preamble, and no pending break.
The transmitter can operate in either of two formats as specified by the M control
bit in the SCCR1 register. When M is zero, one start bit, eight data bits, and one
stop bit is the selected mode. When M is one, one start bit, nine data bits, and one
stop bit is the selected mode. The most common standard word format for NRZ
serial communication is one start bit (logic zero or space) followed by eight data
bits (LSB first) and one stop bit (logic one or mark). If the nine data bit mode is
selected, software control (and overhead) of the ninth bit may be used to support
a number of special formats. The ninth data bit is positioned as two bits in the
SCCR1 register (R8 and T8). It remains unchanged after transmission and may be
used again without having to re-write it. Some examples of its use include:
start, eight data, two stop bits
start, eight data, parity, one stop
w/ odd, even, mark, or space parity
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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