參數(shù)資料
型號: MC68HC705C9ACS
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER
文件頁數(shù): 12/177頁
文件大?。?/td> 1941K
代理商: MC68HC705C9ACS
Serial Peripheral Interface (SPI)
SPI Registers
MC68HC705C9A — Rev. 4.0
Advance Information
MOTOROLA
Serial Peripheral Interface (SPI)
109
10.6 SPI Registers
Three registers in the SPI provide control, status, and data storage
functions. These registers are called the serial peripheral control register
(SPCR), serial peripheral status register (SPSR), and serial peripheral
data I/O register (SPDR) and are described in the following paragraphs.
10.6.1 Serial Peripheral Control Register
The SPI control register (SPCR), shown in Figure 10-4, controls these
functions:
Enables SPI interrupts
Enables the SPI system
Selects between standard CMOS or open drain outputs for port D
(C9A mode only)
Selects between master mode and slave mode
Controls the clock/data relationship between master and slave
Determines the idle level of the clock pin
SPIE — Serial Peripheral Interrupt Enable Bit
This read/write bit enables SPI interrupts. Reset clears the SPIE bit.
1 = SPI interrupts enabled
0 = SPI interrupts disabled
$000A
Bit 7
6
54321
Bit 0
Read:
SPIE
SPE
DWOM
(C9A)
MSTR
CPOL
CPHA
SPR1
SPR0
Write:
Reset:
00
0001
U
U = Undetermined
Figure 10-4. SPI Control Register (SPCR)
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