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參數(shù)資料
| 型號： | MC68HC68T1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Real-Time Clock plus RAM with Serial Interface |
| 中文描述： | 實時時鐘加RAM的串行接口 |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 342K |
| 代理商： | MC68HC68T1 |
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MC68HC68T1
4
MOTOROLA
AC ELECTRICAL CHARACTERISTICS
(TA = – 40 to + 85 C, CL = 200 pF, Input tr = tf = 6 ns, Voltages Referenced to VSS)
Symbol
Parameter
Figure
No.
VDD
V
Guaranteed
Limit
Unit
fSCK
Maximum Clock Frequency (Refer to SCK tw, below)
1, 2, 3
3.0
4.5
6.0
—
2.1
2.1
MHz
tPLH,
tPHL
Maximum Propagation Delay, SCK to MISO
2, 3
3.0
4.5
6.0
200
100
100
ns
tPLZ,
tPHZ
Maximum Propagation Delay, SS to MISO
2, 4
3.0
4.5
6.0
200
100
100
ns
tPZL,
tPZH
Maximum Propagation Delay, SCK to MISO
2, 4
3.0
4.5
6.0
200
100
100
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output (Measured Between 70% VDD
and 20% VDD)
2, 3
3.0
4.5
6.0
200
100
100
ns
Cin
Maximum Input Capacitance
—
10
pF
TIMING REQUIREMENTS
(TA = – 40 to + 85 C, Input tr = tf = 6 ns, Voltages Referenced to VSS)
Symbol
Parameter
Figure
No.
VDD
V
Guaranteed
Limit
Unit
tsu
Minimum Setup Time, SS to SCK
1, 2
3.0
4.5
6.0
200
100
100
ns
tsu
Minimum Setup Time, MOSI to SCK
1, 2
3.0
4.5
6.0
200
100
100
ns
th
Minimum Hold Time, SCK to SS
1, 2
3.0
4.5
6.0
250
125
125
ns
th
Minimum Hold Time, SCK to MOSI
1, 2
3.0
4.5
6.0
200
100
100
ns
trec
Minimum Recovery Time, SCK
1, 2
3.0
4.5
6.0
200
200
200
ns
tw(H),
tw(L
)
Minimum Pulse Width, SCK
1, 2
3.0
4.5
6.0
400
200
200
ns
tw
Minimum Pulse Width, POR
3.0
4.5
6.0
—
100
100
ns
tr, tf
Maximum Input Rise and Fall Times (Except XTALin and POR) (Measured
Between 70% VDD and 20% VDD)
1, 2
3.0
4.5
6.0
—
2
2
s
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